FMP1617DA0 datasheet(4/9 Pages) FIDELIX

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FMP1617DA0(7)

CMOS LPRAM

Revision 0.2

Jul. 2010

DC AND OPERATING CHARACTERISTICS

1. Capacitance is sampled, not 100% tested.

CAPACITANCE1) (f=1MHz , T

A=25’C)

Max

Min

VIO=0V

CIO

Input/Output capacitance

VIN=0V

CIN

Input capacitance

Unit

Test Condition

Symbol

Item

100

/CS≥VCC-0.2V, CS2≥VCC-0.2V, Other inputs=0~VCC

ISB1

Standby Current(CMOS)

-1

/CS=VIH, CS2=VIH, /OE=VIH or /WE=VIL, VIO=VSS to VCC

ILO

Output leakage current

-1

VIN=VSS to VCC

ILI

Input leakage current

Cycle time=1us, 100%duty, IIO=0mA, /CS≤0.2V, CS2=VIH,

VIN≤0.2V or VIN≥VCC-0.2V

ICC1

Average operating current

0.2VCCQ

IOL=0.5mA

VOL

Output low voltage

Cycle time=Min, IIO=0mA, 100% duty, /CS=VIL, CS2=VIH,

VIN=VIL or VIH

ICC2

0.8VCCQ

IOH=-0.5mA

VOH

Output high voltage

0.3

Max

Min

/CS=VIH, CS2=VIH, Other inputs=VIH or VIL

ISB

Standby Current(TTL)

Unit

Test Conditions

Symbol

Item

-10℃ to +60℃

Special

FMP1617DA0(7)-XxxS

0℃ to +70℃

Commercial

FMP1617DA0(7)-XxxC

-25℃ to +85℃

Extended

FMP1617DA0(7)-XxxE

2.7V to VCC

2.7V to 3.3V

-40℃ to +85℃

Industrial

FMP1617DA0(7)-XxxI

VCCQ

VCC

Ambient Temperature

Range

Device

Operating Range

AC Input/Output Reference Waveform

NOTE:

1. AC test inputs are driven at VCCQ for a logic 1 and VSS for a logic 0. Input rise and fall times (10% to 90%) < 1.6ns.

2. Input timing begins at VCCQ/2.

3. Output timing ends at VCCQ/2.

AC Output Load Circuit

DUT

50Ω

30pF

Test Point

VCCQ/2

Test Points

VCCQ/23

VCCQ/2 2

VCCQ

VSS

Input1

Output

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