ZXLD1356

ZXLD1356

Document number: DS33470 Rev. 3 - 2

26 of 29

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December 2010

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Dimming Output Current Using PWM

Low frequency PWM mode

When the ADJ pin is driven with a low frequency PWM signal (eg 100Hz), with a high level voltage VADJ and a low level of zero,

the output of the internal low pass filter will swing between 0V and VADJ, causing the input to the shutdown circuit to fall below

its turn-off threshold (200mV nom) when the ADJ pin is low. This will cause the output current to be switched on and off at the

PWM frequency, resulting in an average output current IOUTavg proportional to the PWM duty cycle. (See Figure 4 - Low

frequency PWM operating waveforms).

Low frequency PWM operating waveforms

The average value of output current in this mode is given by:

S

PWM

OUTavg

R

D

2

.

0

I

=

for DPWM > 0.001

This mode is preferable if optimum LED 'whiteness' is required. It will also provide the widest possible dimming range (approx.

1000:1) and higher efficiency at the expense of greater output ripple.