HT68F13 datasheet(112/161 Pages) HOLTEK

112 / 161 page

MFI1Register

- HT68F15

Bit

Name

T1BF

T1AF

T1PF

T1BE

T1AE

T1PE

R/W

POR

Bit7

unimplemented,readas

²0²

Bit6

T1BF:TM1 Comparator BmatchInterruptrequestflag

0:norequest

1:interruptrequest

Bit5

T1AF:TM1 Comparator A matchinterruptrequestflag

0:norequest

1:interruptrequest

Bit4

T1PF:TM1 Comparator P matchinterruptrequestflag

0:norequest

1:interruptrequest

Bit3

unimplemented,readas

²0²

Bit2

T1BE:TM1 Comparator Bmatchinterruptcontrol

0:disable

1:enable

Bit1

T1AE:TM1 Comparator A matchinterruptcontrol

0:disable

1:enable

Bit0

T1PE:TM1 Comparator P matchinterruptcontrol

0:disable

1:enable

InterruptOperation

When the conditions for an interrupt event occur, such as a TM Comparator P, Comparator A or

Comparator B match, etc., the relevant interrupt request flag will be set. Whether the request flag

actually generates a program jump to the relevant interrupt vector is determined by the condition of the

interrupt enable bit. If the enable bit is set high then the program will jump to its relevant vector; if the

enable bit is zero then although the interrupt request flag is set an actual interrupt will not be generated

and the program will not jump to the relevant interrupt vector. The global interrupt enable bit, if cleared

to zero, will disable all interrupts.

When an interrupt is generated, the Program Counter, which stores the address of the next instruction

to be executed, will be transferred onto the stack. The Program Counter will then be loaded with a new

address which will be the value of the corresponding interrupt vector. The microcontroller will then

fetch its next instruction from this interrupt vector. The instruction at this vector will usually be a

²JMP² which will jump to another section of program which is known as the interrupt service routine.

Here is located the code to control the appropriate interrupt. The interrupt service routine must be

terminated with a

²RETI², which retrieves the original Program Counter address from the stack and

allows the microcontroller to continue with normal execution at the point where the interrupt occurred.

The various interrupt enable bits, together with their associated request flags, are shown in the

accompanying diagrams with their order of priority. Some interrupt sources have their own individual

vector while others share the same multi-function interrupt vector. Once an interrupt subroutine is

serviced, all the other interrupts will be blocked, as the global interrupt enable bit, EMI bit will be

cleared automatically. This will prevent any further interrupt nesting from occurring. However, if other

interrupt requests occur during this interval, although the interrupt will not be immediately serviced,

the request flag will still be recorded.

HT68F13/HT68F14/HT68F15

EnhancedI/OFlashTypeMCU

Rev.1.10

112

February9,2011

HT68F13 Datasheet(PDF) 112 Page - Holtek Semiconductor Inc

HT68F13 Datasheet(HTML) 112 Page - Holtek Semiconductor Inc

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