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VPS12 Datasheet(PDF) 3 Page - Sanyo Semicon Device |
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VPS12 Datasheet(HTML) 3 Page - Sanyo Semicon Device |
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3 / 4 page ![]() Thermal Design Since the VPS12 has the three-channel configuration shown in the circuit diagram on page 2, we first consider a single channel. The chip temperatures of the transistors during operation can be determined from the following formula: Tj = (Tri) = θj-c (Tri) × Pc (Tri) + ∆Tc + Ta (°C) ........................(1) θj-c (Tri): Thermal resistances of the transistor chips themselves Pc (Tri): Collector loss of the transistors ∆Tc: Increase in case temperature Ta: Ambient temperature The θj-c (Tri) for the individual transistors is: θj-c(Tr1) to (Tr4) = 35°C/W.........................................................(2) Although the loss in each transistor in the video pack changes with frequency and thus are not identical, assuming a maximum frequency of 120 MHz (clock), the transistor with the largest loss is Tr3 in the emitter-follower stage. From the Pd-f(clock) figure it can be seen that this loss is 22% of the total loss. Thus: Pc (EF stage) f = 120 MHz = Pd (1ch) f = 120 MHz × 0.22 [W] .............(3) Select a θh for the heat sink so that the junction temperature (Tj) of this transistor does not exceed 150°C. Equation (4) gives the relationship between θh and ∆Tc. ∆Tc = Pd (TOTAL) × θh ..............................................................(4) The required θh can be calculated from this equation and equation (1). No. 5309-3/4 VPS12 |
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