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PCIMX536AVV8C Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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PCIMX536AVV8C Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
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4 / 178 page ![]() i.MX53xA Automotive and Infotainment Applications Processors, Rev. 2 4 Freescale Semiconductor Introduction — 32-bit multiplexed mode NOR Flash, PSRAM & cellular RAM. — 8-bit Asynchronous (DTACK mode) EIM interface. — All EIM pins are muxed on other interfaces (data with NFC pins). I/O muxing logic selects EIM port, as primary muxing at system boot. — Samsung OneNAND™ and managed NAND including eMMC up to rev 4.4 (in muxed I/O mode) The i.MX53xA system is built around the following system on chip interfaces: • 64-bit AMBA AXI v1.0 bus—used by ARM platform, multimedia accelerators (such as VPU, IPU, GPU3D, GPU2D) and the external memory controller (EXTMC) operating at 200 MHz. • 32-bit AMBA AHB 2.0 bus—used by the rest of the bus master peripherals operating at 133 MHz. • 32-bit IP bus—peripheral bus used for control (and slow data traffic) of the most system peripheral devices operating at 66 MHz. The i.MX53xA makes use of dedicated hardware accelerators to achieve state-of-the-art multimedia performance. The use of hardware accelerators provides both high performance and low power consumption while freeing up the CPU core for other tasks. The i.MX53xA incorporates the following hardware accelerators: • VPU, version 3—video processing unit • GPU3D—3D graphics processing unit, OpenGL ES 2.0, version 3, 33 Mtri/s, 200 Mpix/s, and 800 Mpix/s z-plane performance, 256 Kbyte RAM memory • GPU2D—2D graphics accelerator, OpenVG 1.1, version 1, 200 Mpix/s performance, • IPU, version 3M—image processing unit • ASRC—asynchronous sample rate converter The i.MX53xA includes the following interfaces to external devices: NOTE Not all interfaces are available simultaneously, depending on I/O multiplexer configuration. • Hard disk drives: — PATA, up to U-DMA mode 5, 100 MByte/s — SATA I, 1.5 Gbps •Displays: — Five interfaces available. Total rate of all interfaces is up to 180 Mpixels/s, 24 bpp. Up to two interfaces may be active at once. — Two parallel 24-bit display ports. The primary port is up to 165 Mpix/s (for example, UXGA at 60 Hz). — LVDS serial ports: one dual channel port up to 165 Mpix/s or two independent single channel ports up to 85 MP/s (for example, WXGA at 60 Hz) each. — TV-out/VGA port up to 150 Mpix/s (for example, 1080p60). • Camera sensors: |
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