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MAX16929DGUI Datasheet(PDF) 20 Page - Maxim Integrated Products |
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MAX16929DGUI Datasheet(HTML) 20 Page - Maxim Integrated Products |
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20 / 25 page ![]() ���������������������������������������������������������������� Maxim Integrated Products 20 MAX16929 Automotive TFT-LCD Power Supply with Boost Converter and Gate Voltage Regulators Stability Requirements The positive-gate voltage regulator (GH) requires a mini- mum output capacitance for stability. For an output volt- age of 5V to (VCP - 2V) and an output current of 10mA to 15mA, use a minimum capacitance of 0.47FF. Negative-Gate Voltage Regulator Output-Voltage Selection The output voltage of the negative-gate voltage regula- tor can be adjusted by using a resistive voltage-divider formed by RTOP and RBOTTOM. Connect RTOP between REF and FBGL, and connect RBOTTOM between FBGL and the collector of the external npn transistor. Select RTOP greater than 20kI to avoid loading down the ref- erence output. Calculate RBOTTOM with the following equation: FBGL GL BOTTOM TOP REF FBGL V V R R V V − = × − where VGL is the desired output voltage, VREF = 1.25V, and VFBGL = 0.25V (the regulated feedback voltage of the regulator). Pass Transistor Selection The pass transistor must meet specifications for current gain (hFE), input capacitance, collector-emitter saturation voltage, and power dissipation. The transistor’s current gain limits the guaranteed maximum output current to: BE LOAD(MAX) DRVN FE(MIN) BE V I (I ) h R = − × where IDRVN is the minimum guaranteed base-drive cur- rent, VBE is the transistor’s base-to-emitter forward volt- age drop, and RBE is the pulldown resistor connected between the transistor’s base and emitter. Furthermore, the transistor’s current gain increases the regulator’s DC loop gain (see the Stability Requirements section), so excessive gain destabilizes the output. The transistor’s saturation voltage at the maximum output current determines the minimum input-to-output volt- age differential that the regulator can support. Also, the package’s power dissipation limits the usable maximum input-to-output voltage differential. The maximum power- dissipation capability of the transistor’s package and mounting must exceed the actual power dissipated in the device. The power dissipated equals the maximum load current (ILOAD(MAX)_GL) multiplied by the maximum input-to-output voltage differential: PNPN_GL = (VGL - VCN) × ILOAD(MAX)_GL where VGL is the regulated output voltage on the collec- tor of the transistor, VCN is the inverting charge-pump output voltage applied to the emitter of the transistor, and ILOAD(MAX)_GL is the maximum load current. Note that the external transistor is not short-circuit protected. Stability Requirements The device’s negative-gate voltage regulator uses an internal transconductance amplifier to drive an external pass transistor. The transconductance amplifier, the pass transistor, the base-emitter resistor, and the output capacitor determine the loop stability. The transconductance amplifier regulates the output volt- age by controlling the pass transistor’s base current. The total DC loop gain is approximately: BIAS FE V_GL REF T LOAD I h 4 A ( ) (1 ) V V I × ≅ × + × where VT is 26mV at room temperature, and IBIAS is the current through the base-to-emitter resistor (RBE). For the device, the bias current for the negative-gate voltage regulator is 0.1mA. Therefore, the base-to-emitter resistor should be chosen to set 0.1mA bias current: BE BE V 0.7V R 7k 0.1mA 0.1mA = = = Ω Use the closest standard resistor value of 6.8kI. The output capacitor and the load resistance create the dominant pole in the system. However, the internal amplifier delay, pass transistor’s input capacitance, and the stray capacitance at the feedback node create additional poles in the system, and the output capacitor’s ESR generates a zero. For proper operation, use the fol- lowing equations to verify that the regulator is properly compensated: 1) First, determine the dominant pole set by the regula- tor’s output capacitor and the load resistor: LOAD(MAX)_GL POLE_GL OUT_GL OUT_GL I f 2 C V = π × × The unity-gain crossover frequency of the regulator is: fCROSSOVER = AV_GL × fPOLE_GL 2) The pole created by the internal amplifier delay is approximately 1MHz: fPOLE_AMP = 1MHz |
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