SC1110

SINK AND SOURCE DC/DC CONTROLLER FOR

TERMINATION POWER SUPPLY APPLICATIONS

© 2000 SEMTECH CORP.

652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - October 9, 2000

5

THEORY OF OPERATION

Synchronous Buck Converter

V

voltage-mode pulse width modulated (PWM) controller.

This section has all the features required to build a

high efficiency synchronous buck converter for termi-

nation of power application.

The output voltage of the synchronous converter is set

and controlled by the output of the error amplifier. The

resistive divider generates reference voltage for the

error amplifier from an external chipset voltage which

is usually 2.5V. The inverting input of the error amplifier

receives its voltage from the SENSE pin.

The internal oscillator uses an on-chip capacitor and

trimmed precision current sources to set the oscillation

frequency to 250kHz. The triangular output of the os-

cillator sets the reference voltage at the inverting input

of the PWM comparator. The non-inverting input of the

comparator receives it’s input voltage from the error

amplifier. When the oscillator output voltage drops be-

low the error amplifier output voltage, the comparator

output goes high. This pulls DL low, turning off the low-

side FET, and DH is pulled high, turning on the high-

side FET (once the cross-current control allows it).

When the oscillator voltage rises back above the error

amplifier output voltage, the comparator output goes

low. This pulls DH low, turning off the high-side FET,

and DL is pulled high, turning on the low-side FET

(once the cross-current control allows it).

As SENSE increases, the output voltage of the error

amplifier decreases. This causes a reduction in the on-

time of the high-side MOSFET connected to DH,

hence lowering the output voltage.

Under Voltage Lockout

The under voltage lockout circuit of the SC1110 as-

sures that both the high-side MOSFET driver outputs

remain in the off state whenever the supply voltage

drops below set parameters. Lockout occurs if V

below 4.0V. Normal operation resumes once V

above 4.2V.

Soft Start

Initially, SS/ENABLE sources 10µA of current to

charge an external capacitor. The outputs of the error

amplifiers are clamped to a voltage proportional to the

voltage on SS/ENABLE. This limits the on-time of the

high-side MOSFETs, thus leading to a controlled ramp-

up of the output voltages.

R

The current limit threshold is set by connecting an ex-

ternal resistor from the V

age drop across this resistor is due to the 200µA inter-

nal sink sets the voltage at the pin. This voltage is

compared to the voltage at the PHASE node. This

comparison is made only when the high-side drive is

high to avoid false current limit triggering due to uncon-

tributing measurements from the MOSFET’s off-

voltage. When the voltage at PHASE is less than the

voltage at OCSET, an overcurrent condition occurs

and the soft start cycle is initiated. The synchronous

switcher turns off and SS/ENABLE starts to sink 2µA.

When SS/ENABLE reaches 0.8V, it then starts to

source 10µA and a new cycle begins.

Hiccup Mode

During power up, the SS/ENABLE pin is internally

pulled low until VCC reaches the undervoltage lockout

level of 4.2V. Once V

ABLE pin is released and begins to source 10µA of

current to the external soft-start capacitor. As the soft-

start voltage rises, the output of the internal error am-

plifier is clamped to this voltage. When the error signal

reaches the level of the internal triangular oscillator,

which swings from 1V to 2V at a fixed frequency of 250

kHz, switching occurs. As the error signal crosses

over the oscillator signal, the duty cycle of the PWM

signal continues to increase until the output comes into

regulation. If an over-current condition has not oc-

curred the soft-start voltage will continue to rise and

level off at about 2.2V.

An over-current condition occurs when the high-side

drive is turned on, but the PHASE node does not

reach the voltage level set at the OCSET pin. The

PHASE node is sampled only once per cycle during the

valley of the triangular oscillator. Once an over-current

occurs, both the high-side and low-side drivers turn off

and the SS/ENABLE pin begins to sink 2uA. The soft-

start voltage will begin to decrease as the 2uA of cur-

rent discharges the external capacitor. When the soft-

start voltage reaches 0.8V, the SS/ENABLE pin will be-

gin to source 10uA and begin to charge the external

capacitor causing the soft-start voltage to rise again.

Again, when the soft-start voltage reaches the level of

the internal oscillator, switching will occur.

If the over-current condition is no longer present, nor-

mal operation will continue. If the over-current condi-

tion is still present, the SS/ENABLE pin will again begin

to sink 2uA. This cycle will continue indefinitely until

the over-current condition is removed.