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TMS320F28027DAS Datasheet(PDF) 13 Page - Texas Instruments |
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TMS320F28027DAS Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 130 page ![]() 3 External Interrupts M0 SARAM 1K x 16 (0-wait) 16-bit Peripheral Bus M1 SARAM 1K x 16 (0-wait) SCI (4L FIFO) ePWM SPI (4L FIFO) I2C (4L FIFO) HRPWM eCAP 32-Bit Peripheral Bus Code Security Module GPIO MUX C28x 32-bit CPU A7:0 B7:0 PIE CPU Timer 0 CPU Timer 1 CPU Timer 2 TCK TDI TMS TDO TRST OSC1, OSC2, Ext, PLL, LPM, WD XCLKIN X2 XRS 32-bit Peripheral Bus COMP1OUT GPIO Mux LPM Wakeup AIO MUX ADC PSWD FLASH 8K/16K/32K x 16 Secure OTP 1K x 16 Secure OTP/Flash Wrapper Boot-ROM 8K x 16 (0-wait) SARAM 1K/3K/4K x 16 (0-wait) Secure COMP COMP1A COMP1B COMP2A COMP2B COMP2OUT X1 GPIO MUX VREG From COMP1OUT, COMP2OUT POR/ BOR Memory Bus Memory Bus TMS320F28027, TMS320F28026, TMS320F28023, TMS320F28022 TMS320F28021, TMS320F28020, TMS320F280200 www.ti.com SPRS523F – NOVEMBER 2008 – REVISED DECEMBER 2010 3 Functional Overview 3.1 Block Diagram A. Not all peripheral pins are available at the same time due to multiplexing. Figure 3-1. Functional Block Diagram Copyright © 2008–2010, Texas Instruments Incorporated Functional Overview 13 Submit Documentation Feedback Product Folder Link(s): TMS320F28027 TMS320F28026 TMS320F28023 TMS320F28022 TMS320F28021 TMS320F28020 TMS320F280200 |
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