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LPC1111 Datasheet(PDF) 1 Page - NXP Semiconductors

Part # LPC1111
Description  Cortex-M0 MCUs with lowest active power and superior code density
PDF  2 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1111 Datasheet(HTML) 1 Page - NXP Semiconductors

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NXP 50-MHz, 32-bit
Cortex-M0™ microcontrollers
LPC1100L
Built around the new Cortex-M0 architecture, the smallest, lowest power, and most energy-efficient
ARM core ever developed, these MCUs are ideally equipped for use in many traditional 8/16-bit
applications.
} Other :
- Up to 42 general-purpose I/O (GPIO) pins with configurable
pull-up/down resistors and a new, configurable open-drain
operating mode
- Four general-purpose counter/timers, with a total of four
capture inputs and 13 match outputs
- Programmable watchdog timer (WDT) with lock-out feature
- System tick timer
- Each peripheral has its own clock divider for power savings
Applications
} White goods
} e-Metering
} Consumer peripherals
} Remote sensors
} 8/16-bit applications
} Industrial networking
} System supervisors
Key features
} ARM Cortex-M0 processor
- 50 MHz operation
- Nested Vectored Interrupt Controller for fast deterministic
interrupts
- Wakeup Interrupt Controller allows automatic wake from
a priority interrupt
- Three reduced-power modes: Sleep, Deep-sleep,
and Deep power-down
} Memories
- Up to 32 KB Flash memory
- Up to 8 KB SRAM
} Serial peripherals
- UART with fractional baud rate generation, internal FIFO,
and RS-485 support
- Up to 2 SPI controllers with FIFO and multi-protocol
capabilities
- I2C-bus interface supporting full I2C-bus specification and
Fast-mode Plus (Fm+) with a data rate of 1 Mbit/s, multiple
address recognition, and monitor mode
} Analog peripheral
- 10-bit analog-to-digital converter with eight channels and
conversion rates up to 400 K samples per second
Cortex-M0 MCUs with lowest active
power and superior code density


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