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LZ24BP Datasheet(PDF) 3 Page - Sharp Corporation |
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LZ24BP Datasheet(HTML) 3 Page - Sharp Corporation |
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3 / 10 page ![]() 3 LZ24BP RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN. TYP. MAX. UNIT NOTE Ambient operating temperature TOPR 25.0 ˚C Output transistor drain voltage VOD 14.55 15.0 15.45 V NOTES : 1. Use the circuit parameter indicated in "SYSTEM CONFIGURATION EXAMPLE", and do not connect to DC voltage directly. 2. VPW is set below VØVL that is low level of vertical shift register clock, or is used with the same power supply that is connected to VL of V driver IC. * To apply power, first connect GND and then turn on VOD. After turning on VOD, turn on PW first and then turn on other powers and pulses. Do not connect the device to or disconnect it from the plug socket while power is being applied. 1 V 22.5 VØOFD Overflow drain clock P-well voltage VPW –10.0 VØVL V2 Ground GND 0.0 V V –8.5 –9.0 –9.5 VØV1L, VØV2L VØV3AL, VØV3BL Vertical shift register clock LOW level INTERMEDIATE level HIGH level VØV1I, VØV2I VØV3AI, VØV3BI VØV3AH, VØV3BH 14.55 0.0 15.0 15.45 V V LOW level Horizontal shift register clock VØH1L, VØH2L –0.05 0.0 0.05 V HIGH level VØH1H, VØH2H 3.0 3.3 5.5 V 1 V 5.5 3.3 3.0 VØRS Reset gate clock p-p level Reset gate clock frequency fØRS 12.27 MHz Horizontal shift register clock frequency fØH1, fØH2 12.27 MHz Vertical shift register clock frequency fØV1, fØV2 fØV3A, fØV3B 15.73 kHz p-p level |
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