preliminary

preliminary

MB4U

BiSS, SSI, PC-USB 2.0 ADAPTER

Rev B2, Page 2/5

DESCRIPTION

The MB4U is a PC-USB 2.0 high speed interface BiSS master based on FPGA logic system design.

BiSS Interface Functions and Features:

• Up to 8 BiSS slaves

• RS422 10 MBit/s maximum data transfer rate

• SSI master

• BiSS C unidirectional and BiSS C master

• BiSS master MB100 BiSS IP based

• USB 2.0 interface up to 30 MBit/s data transfer

• USB 1.1 interface compatibility to 12 MBit/s data transfer

• Adapter and devices bus powerable

• Available drivers for Windows 2000, XP, Vista, 7

• FPGA integrated 1st level RAM

CONNECTORS

PIN CONFIGURATION BiSS

PIN FUNCTIONS

No. Name Function

1 VB

Field power supply

2 MA+

Clock output P

3 MA-

Clock output N

4 VDD

Logic power supply

5 MO-

Master data output N

6 GND

Ground (0 V)

7 SL+

Device data input P

8 SL-

Device data input N

9 MO+

Master data output P

PIN CONFIGURATION Mini USB

PIN FUNCTIONS

No. Name Function

1 VCC

5 V USB supply

2 D-

Data -

3 D+

Data +

4 ID

Identifier: A = GND, B n.c.

5 GND

Ground (0 V)