LB1980H

No.5974-2/7

Allowable Operating Ranges at Ta = 25

°C

Parameter

Symbol

Conditions

Ratings

Unit

VS

5 to 22

V

Supply voltage

VCC

4.5 to 5.5

V

Hall input amplitude

VHALL

Between the hall inputs

±30 to ±80

mVo-p

GSENSE pin input range

VGSENSE

With respect to the control system ground

-0.20 to +0.20

V

Electrical Characteristics at Ta

= 25°C, VCC = 5V,VS = 15V

Ratings

Parameter

Symbol

Conditions

min

typ

max

Unit

VCC supply current

ICC

RL=∞, VCTL=0V, VLIM=0V (Quiescent)

12

18

mA

Outputs

VO sat1

IO=500mA, Rf=0.5Ω, Sink+Source

VCTL=VLIM=5V(With saturation prevention)

2.1

2.6

V

Output saturation voltage

VO sat2

IO=1.0mA, Rf=0.5Ω, Sink+Source

VCTL=VLIM=5V(With saturation prevention)

2.6

3.5

V

Output leakage current

IO leak

1.0

mA

FR

FR pin input threshold voltage

VFSR

2.25

2.50

2.75

V

FR pin input bias current

IB(FSR)

-5.0

mA

Control

CTLREF pin voltage

VCREF

2.05

2.15

2.25

V

CTLREF pin input range

VCREFIN

1.50

3.50

V

CTL pin input bias current

IB(CTL)

With VCTL=5V and the CTLREF pin open

4.0

µA

CTL pin control start voltage

VCTL(ST)

With Rf=0.5

Ω, VLIM=5V, IO≥10mA,

Hall input logic fixed (U, V, W=H, H, L)

2.00

2.15

2.30

V

CTL pin control Gm

Gm(CTL)

With Rf=0.5

Ω, ∆IO=200mA,

Hall input logic fixed (U, V, W=H, H, L)

0.46

0.58

0.70

A / V

Current Limiter

LIM current limit offset voltage

Voff(LIM)

With Rf=0.5

Ω, VCTL=5V, IO≥10mA,

Hall input logic fixed (U, V, W=H, H, L)

140

200

260

mV

LIM pin input bias current

IB(LIM)

With VCTL=5V and the VCREF pin open

-2.5

µA

LIM pin current control level

ILIM

With Rf=0.5

Ω, VCTL=5V, VLIM=2.06V

Hall input logic fixed (U, V, W=H, H, L)

830

900

970

mA

Hall Amplifier

Hall amplifier input offset voltage

Voff(HALL)

-6

+6

mA

Hall amplifier input bias current

IB(HALL)

1.0

3.0

µA

Hall amplifier common-mode

input voltage range

VCM(HALL)

1.3

3.3

V

TRC

Torque ripple correction ratio

TRC

For the high and low peaks in the

Rf waveform when IO=200mA.

(Rf=0.5

Ω, with the ADJ pin open) *1

9

%

ADJ pin voltage

VADJ

2.37

2.50

2.63

V

FG Amplifier

FG amplifier input offset voltage

Voff(FG)

-8

+8

mV

FG amplifier input bias current

IB(FG)

-100

nA

FG amplifier output saturation

voltage

VO sat (FG)

Sink side, for the load provided by the internal

pull-up resistor

0.5

V

FG amplifier voltage gain

VG(FG)

For the open loop state with f=10kHz

41.5

44.5

47.5

dB

FG amplifier common-mode

input voltage

VGM(FG)

0.5

4.0

V

Saturation

Saturation prevention circuit

lower side voltage setting

VO sat(DET)

The voltages between each OUT and

Rf pair when IO=10mA, Rf=0.5Ω, and

VCTL=VLIM=5V

0.175

0.25

0.325

V

TSD

TSD operating temperature

TSD

Design target value *2

180

°C

Hysteresis width

∆TSD

Design target value *2

20

°C

Notes : *1. The torque ripple correction ratio is determined as follows from the Rf voltage waveform.

*2. Parameters that are indicated as design target values in the conditions column are not tested.