HT32F1252 datasheet(21/35 Pages) HOLTEK

21 / 35 page

Rev. 1.00

21 of 35

May 27, 2011

32-bit ARM Cortex™-M3 MCU

HT32F1251/51B/52/53

Name

Pins

Type

(Note1)

Level

(Note2)

Description

LQFP

Default function

(AF0)

AF1

AF2

AF3

PB13

I/O

5V-T

GPIO PB13

SPI_SCK

UR_DSR

GT1_CH2

PB14

I/O

5V-T

GPIO PB14

SPI_MISO

UR_DTR

GT1_CH1

PB15

I/O

5V-T

GPIO PB15

SPI_MOSI

UR_RI

GT1_CH0

PB0

I/O

XTALIN

PB0

PB1

I/O

XTALOUT

PB1

VDD18

1.8 V voltage for core

N.C

PB2

I/O

GPIO PB2

CN0

GT1_CH0

PB3

I/O

GPIO PB3

CP0

GT1_CH1

PB4

I/O

GPIO PB4

AOUT0

UR_RTS/TXE GT1_CH2

PB5

I/O

GPIO PB5

CN1

GT1_CH3

PB6

I/O

GPIO PB6

CP1

GT1_ETI

PB7

I/O

GPIO PB7

AOUT1

UR_CTS/SCK GT0_ETI

VDD33_1

3.3 V voltage for digital I/O

VSS33_1

Ground reference for digital I/O

VDDA

3.3 V analog voltage for ADC and OPA/Comparator

VSSA_1

Ground reference for ADC and OPA/Comparator

NOTES: 1. I = input, O = output, P = power supply.

2. 5V-T = 5 V tolerant.

3. HT32F1251B does not include the VBAT, XTAL32KIN and XTAL32KOUT pins.

4. The GPIOs are in AF0 state after VDD18 power on reset (POR) except the RTCOUT pin of Backup

Domain I/O. The RTCOUT pin is reset by the Backup Domain power-on-reset (PORB) or Backup

Domain software reset (BAK_RST bit in BAK_CR register).

5. The backup domain of I/O pins has driving current capability limitation (< 1mA @ VBAT = 3.3 V).

HT32F1252 Datasheet(PDF) 21 Page - Holtek Semiconductor Inc

HT32F1252 Datasheet(HTML) 21 Page - Holtek Semiconductor Inc

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