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HT46R063B Datasheet(PDF) 49 Page - Holtek Semiconductor Inc |
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HT46R063B Datasheet(HTML) 49 Page - Holtek Semiconductor Inc |
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49 / 96 page ![]() HT46R064B/065B/066B Rev. 1.00 49 April 8, 2011 7+1 PWM Mode Each full PWM cycle, as it is controlled by an 8-bit PWM register, has 256 clock periods. However, in the 7+1 PWM mode, each PWM cycle is subdivided into two indi- vidual sub-cycles known as modulation cycle 0 ~ modula- tion cycle 1, denoted as i in the table. Each one of these two sub-cycles contains 128 clock cycles. In this mode, a modulation frequency increase of two is achieved. The 8-bit PWM register value, which represents the overall duty cycle of the PWM waveform, is divided into two groups. The first group which consists of bit1~bit7 is de- noted here as the DC value. The second group which consists of bit0 is known as the AC value. In the 7+1 PWM mode, the duty cycle value of each of the two mod- ulation sub-cycles is shown in the following table. Parameter AC (0~1) DC (Duty Cycle) Modulation cycle i (i=0~1) i<AC DC+1 128 i ³AC DC 128 7+1 Mode Modulation Cycle Values The following diagram illustrates the waveforms associ- ated with the 7+1 mode PWM operation. It is important to note how the single PWM cycle is subdivided into 2 in- dividual modulation cycles, numbered 0 and 1 and how the AC value is related to the PWM value. PWM Output Control The PWM outputs are pin-shared with the I/O pins PA4, PC2 and PC3. To operate as a PWM output and not as an I/O pin, the correct bits must be set in the CTRL0 and CTRL2 register. A zero value must also be written to the corresponding bit in the I/O port control register PAC.4, PCC.2 and PCC.3 to ensure that the corresponding PWM output pin is setup as an output. After these two initial steps have been carried out, and of course after the required PWM value has been written into the PWMn register, writing a high value to the correspond- ing bit in the output data register PA.4, PC.2 and PC.3 will enable the PWM data to appear on the pin. Writing a zero value will disable the PWM output function and force the output low. In this way, the Port data output registers can be used as an on/off control for the PWM function. Note that if the CTRL0 and CTRL2 registers have selected the PWM function, but a high value has been written to its corresponding bit in the PAC or PCC control register to configure the pin as an input, then the pin can still function as a normal input line, with pull-high resistor options. f S Y S / 2 P W M [ P W M ] = 1 0 0 [ P W M ] = 1 0 1 P W M [ P W M ] = 1 0 2 P W M [ P W M ] = 1 0 3 P W M P W M c y c l e : 2 5 6 / f S Y S 2 5 / 6 4 2 6 / 6 4 2 6 / 6 4 2 6 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 6 / 6 4 2 6 / 6 4 2 5 / 6 4 2 5 / 6 4 2 6 / 6 4 2 5 / 6 4 2 6 / 6 4 2 6 / 6 4 2 6 / 6 4 M o d u l a t i o n c y c l e 0 P W M m o d u l a t i o n p e r i o d : 6 4 / f S Y S M o d u l a t i o n c y c l e 1 M o d u l a t i o n c y c l e 2 M o d u l a t i o n c y c l e 3 M o d u l a t i o n c y c l e 0 6+2 PWM Mode P W M R e g i s t e r ( 6 + 2 ) M o d e b 7 b 0 A C v a l u e D C v a l u e PWM Register for 6+2 Mode |
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