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P421 Datasheet(PDF) 2 Page - Vishay Siliconix

Part # P421
Description  Passivated Assembled Circuit Elements, 40 A
PDF  6 Pages
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Manufacturer  VISHAY [Vishay Siliconix]
Direct Link  http://www.vishay.com
Logo VISHAY - Vishay Siliconix

P421 Datasheet(HTML) 2 Page - Vishay Siliconix

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www.vishay.com
For technical questions, contact: indmodules@vishay.com
Document Number: 93755
2
Revision: 05-Nov-09
P400 Series
Vishay High Power Products
Passivated Assembled
Circuit Elements, 40 A
ON-STATE CONDUCTION
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum DC output current
at case temperature
IO
Full bridge circuits
40
A
80
°C
Maximum peak, one-cycle
non-repetitive on-state or
forward current
ITSM,
IFSM
t = 10 ms
No voltage
reapplied
Sinusoidal half wave,
initial TJ = TJ maximum
385
A
t = 8.3 ms
400
t = 10 ms
100 % VRRM
reapplied
325
t = 8.3 ms
340
Maximum I2t for fusing
I2t
t = 10 ms
No voltage
reapplied
745
A2s
t = 8.3 ms
680
t = 10 ms
100 % VRRM
reapplied
530
t = 8.3 ms
480
Maximum I2
√t for fusing
I2
√t
t = 0.1 ms to 10 ms, no voltage reapplied
I2t for time tx = I2
√t · √tx
7450
A2
√s
Low level value of threshold voltage
VT(TO)1
(16.7 % x
π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum
0.83
V
High level value of threshold voltage
VT(TO)2
(I >
π x IT(AV)), TJ = TJ maximum
1.03
Low level value of on-state slope resistance
rt1
(16.7 % x
π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum
9.61
m
Ω
High level value of on-state slope resistance
rt2
(I >
π x IT(AV)), TJ = TJ maximum
7.01
Maximum on-state voltage drop
VTM
ITM =
π x IT(AV)
TJ = 25 °C
1.4
V
Maximum forward voltage drop
VFM
IFM =
π x IF(AV)
Maximum non-repetitive rate of rise of
turned-on current
dI/dt
TJ = 125 °C from 0.67 VDRM
ITM =
π x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs
200
A/μs
Maximum holding current
IH
TJ = 25 °C anode supply = 6 V, resistive load
130
mA
Maximum latching current
IL
250
BLOCKING
PARAMETER
SYMBOL
TEST CONDITIONS
VALUES
UNITS
Maximum critical rate of rise of
off-state voltage
dV/dt
TJ = 125 °C, exponential to 0.67 VDRM gate open
200
V/μs
Maximum peak reverse and off-state
leakage current at VRRM, VDRM
IRRM,
IDRM
TJ = 125 °C, gate open circuit
10
mA
Maximum peak reverse leakage current
IRRM
TJ = 25 °C
100
μA
RMS isolation voltage
VISOL
50 Hz, circuit to base, all terminals shorted,
TJ = 25 °C, t = 1 s
2500
V



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