Internal

Band Gap

Reference

Control Logic

+

Charge Pump

OVLO

UVLO

GND

ACK

EN

D+

D-

ID

V

OUT

BUS

TPD4S014

SLVSAU0B

– MAY 2011 – REVISED OCTOBER 2011

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

CIRCUIT SCHEMATIC DIAGRAM

DEVICE OPERATION

OTP

UVLO

OVLO

EN

SW

ACK

X

H

X

X

OFF

H

X

X

H

X

OFF

H

L

L

L

H

OFF

L

L

L

L

L

ON

L

H

X

X

X

OFF

H

OTP = Over temperature protection circuit active

UVLO = Under voltage lock-out circuit active

OVLO = Over voltage lock-out circuit active

SW = Load switch

CP = Charge pump

X = Don

’t Care

H = True

L = False

2

Copyright

© 2011, Texas Instruments Incorporated