SIP4613B datasheet(4/10 Pages) VISHAY

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Document Number: 69998

S-82461-Rev. B, 06-Oct-08

Vishay Siliconix

SiP4613A, SiP4613B

DETAILED DESCRIPTION

The SiP4613A, SiP4613B limits load current by sampling the

pass transistor current and passing that through an external

resistor, RSET. The voltage across RSET, VSET, is then

compared with an internal reference voltage, VREF. In the

event that load current surpasses the set limit current, VSET

will exceed VREF causing the pass transistor gate voltage to

increase, thereby reducing the gate to source voltage of the

PMOS switch and regulating its current back down to ILIMIT.

Setting the Current Limit Level

Setting the current limit level on the SiP4613A, SiP4613B

requires some care to ensure the maximum current required

by the load will not trigger the current limit circuitry. The

minimum current limit threshold should be determined by

taking the maximum current required by the load, ILOAD, and

adding

25 % headroom. The SiP4613A, SiP4613B has a

current limit tolerance of 25 %, which is largely a result of

process variations from part to part, and also temperature

and

VIN/VOUT variances. Thus, to ensure that the actual

current limit is never below the desired current limit a 1/0.80

= 1.25 coefficient needs to be added to the calculations.

Knowing the maximum load current required, the value of

RSET is calculated as follows.

RSET = RSET coefficient/ILIMIT

where ILIMIT = (ILOAD x 1.25) x 1.20 and RSET coefficient is

3460 for a 500 mA current limit. For typical RSET coefficient

values

given

limit

current

refer

the

"Typical

Characteristics" section.

Operation at Current Limit and Thermal Shutdown

In the event that a load higher than ILIMIT is demanded of the

SiP4613A, SiP4613B the load current will stay fixed at the

current limit established by RSET. However, since the

required current is not supplied, the voltage at OUT will drop.

The increase in VIN - VOUT will cause the chip to dissipate

more heat. The power dissipation for the SiP4613A,

SiP4613B can be expressed as

P = ILOAD x (VIN - VOUT)

Once this exceeds the maximum power dissipation of the

package, the die temperature will rise. When the die

temperature exceeds an over-temperature limit of 165 °C,

the SiP4613A, SiP4613B will shut down until it has cooled

down to 145 °C, before starting up again. As can be seen in

the figure below, the SiP4613A, SiP4613B will continue to

cycle on and off until the load is reduced or the part is turned

off (see figure 4 on next page).

The maximum power dissipation in any application is

dependant

the

maximum

junction

temperature,

TJ(MAX) = 125 °C, the junction-to-ambient thermal resistance

for the TSC75-6 package,

J-A = 131 °C/W, and the ambient

temperature, TA, which may be formulaically expressed as:

It then follows that assuming an ambient temperature of

70 °C, the maximum power dissipation will be limited to about

419 mW.

There is CL pin designed to indicate the current limit status of

SiP4613. A typical 5 k

Ω resistor is required to connect

between CL pin and IN pin. In the event of the output over

load, the current limit flag pin CL will go low to indicate the

current limit status of the device. Figure 2 shows the voltage

on CL pin go low after output short.

Figure 2

The voltage signal in CL pin is not only used to indicate the

output short circuit status. It is also used to indicate the

thermal protection status of the device. Once the thermal

protection is activated in the severe output short circuit

condition, the voltage signal on the CL pin will run into the

thermal protection cycling. Figure 3 shows the voltage

waveform of CL pin after activation of the thermal protection

circuit due to the severe short circuit status of the device’s

output.

Figure 3

The thermal protection is the final protection to the device.

The device will be completely shut down including the open

drain current limit indicator pin CL until the device

temperature drop below 145 °C.

131

125

(max)

VOUT (500 mV/div)

CL (500 mV/div)

VOUT = 2.4 V

RSET = 6.81 kΩ

50 µs/div

VOUT (2 V/div)

CL (2 V/div)

VOUT = 5.5 V

RSET = 6.81 kΩ

20 ms/div

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