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ISL70001SEH Datasheet(PDF) 13 Page - Intersil Corporation

Part # ISL70001SEH
Description  Rad Hard and SEE Hard 6A Synchronous Buck Regulator
PDF  17 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL70001SEH Datasheet(HTML) 13 Page - Intersil Corporation

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ISL70001SEH
13
FN7956.0
November 30, 2011
Another stability requirement on the selection of the output
capacitor is that the ‘ESR zero’ (fZESR) be placed at 60kHz to
90kHz. This range is set by an internal, single compensation zero
at 8.6kHz. This ESR zero location contributes to increased phase
margin of the control loop; therefore (Equation 14):
In conclusion, the output capacitors must meet three criteria:
1. They must have sufficient bulk capacitance to sustain the
output voltage during a load transient while the output
inductor current is slewing to the value of the load transient.
2. The ESR must be sufficiently low to meet the desired output
voltage ripple due to the output inductor current.
3. The ESR zero should be placed, in a rather large range, to
provide additional phase margin.
OUTPUT INDUCTOR SELECTION
Once the output capacitors are selected, the maximum allowable
ripple voltage, VP-P(MAX), determines the lower limit on the
inductance as shown in Equation 15.
Since the output capacitors are supplying a decreasing portion of
the load current while the regulator recovers from the transient,
the capacitor voltage becomes slightly depleted. The output
inductor must be capable of assuming the entire load current
before the output voltage decreases more than
ΔVMAX. This
places an upper limit on inductance.
Equation 16 gives the upper limit on output inductance for the
case when the trailing edge of the current transient causes a
greater output voltage deviation than the leading edge.
Equation 17 addresses the leading edge. Normally, the trailing
edge dictates the inductance selection because duty cycles are
usually <50%. Nevertheless, both inequalities should be
evaluated, and inductance should be governed based on the
lower of the two results. In each equation, LOUT is the output
inductance, COUT is the total output capacitance, and ΔIL(P-P) is
the peak-to-peak ripple current in the output inductor.
The other concern when selecting an output inductor is to ensure
there is adequate slope compensation when the regulator is
operated above 50% duty cycle. Since the internal slope
compensation is fixed, output inductance should satisfy
Equation 18 to ensure this requirement is met.
Input Capacitor Selection
Input capacitors are responsible for sourcing the AC component
of the input current flowing into the switching power devices.
Their RMS current capacity must be sufficient to handle the AC
component of the current drawn by the switching power devices,
which is related to duty cycle. The maximum RMS current
required by the regulator is closely approximated by Equation 19.
The important parameters to consider when selecting an input
capacitor are the voltage rating and the RMS ripple current
rating. For reliable operation, select capacitors with voltage
ratings at least 1.5x greater than the maximum input voltage.
The capacitor RMS ripple current rating should be higher than
the largest RMS ripple current required by the circuit.
Ceramic capacitors with X7R dielectric are recommended.
Alternately, a combination of low ESR solid tantalum capacitors
and ceramic capacitors with X7R dielectric may be used. The
ISL70001SEH requires a minimum effective input capacitance of
100µF for stable operation.
Derating Current Capability
Most space programs issue specific derating guidelines for parts,
but these guidelines take the pedigree of the part into account.
For instance, a device built to MIL-PRF-38535, such as the
ISL70001, is already heavily derated from a current density
standpoint. However, a mil-temp or commercial IC that is
up-screened for use in space applications may need additional
current derating to ensure reliable operation because it was not
built to the same standards as the ISL70001.
Figure 10 shows the maximum average output current of the
ISL70001 with respect to junction temperature. These plots take
into account the worst-case current share mismatch in the power
blocks and the current density requirement of MIL-PRF-38535
(< 2 x 105 A/cm2). The plot clearly shows that the ISL70001 can
handle 12.1A at +125°C from a worst-case current density
standpoint, but the part is limited to 7.8A because that is the
lower limit of the current limit threshold with all six power blocks
connected.
ESR
1
2
π fZESR
() COUT
()
----------------------------------------------
=
(EQ. 14)
LOUT ESR
VIN VOUT
–
()VOUT
fs VIN
×
VP-P(MAX)
×
--------------------------------------------------
×
≥
(EQ. 15)
LOUT
2
COUT VOUT
⋅⋅
ΔISTEP
()2
---------------------------------------
ΔV
MAX
ΔIL(P-P) ESR
⋅
()
–
≤
(EQ. 16)
LOUT
2COUT
⋅
ΔISTEP
()2
--------------------------
ΔV
MAX
ΔIL(P-P) ESR
⋅
()
–
V
IN
V
O
UT
–
⎝⎠
⎛⎞
≤
(EQ. 17)
LOUT
4.32
μH
NumberofLXxPinsConnected
-----------------------------------------------------------------------------------
≥
(EQ. 18)
IRMS
MAX
VOUT
VIN
-----------------
IOUT
MAX
2
1
12
------
VIN VOUT
–
LOUT fs
×
----------------------------------
VOUT
VIN
-----------------
×
⎝⎠
⎜⎟
⎛⎞ 2
×
+
⎝⎠
⎜⎟
⎛⎞
×
=
(EQ. 19)
12.14
10.18
8.57
7.25
6.16
5.3
4
5
6
7
8
9
10
11
12
13
120
125
130
135
140
145
150
155
JUNCTION TEMPERATURE (°C)
MINIMUM OCP
LEVEL = 7.8A
6A @ +146°C
FIGURE 10. CURRENT vs TEMPERATURE



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