CMLDM7003TG

SURFACE MOUNT

DUAL N-CHANNEL

ENHANCEMENT-MODE

SILICON MOSFET

DESCRIPTION:

The CENTRAL SEMICONDUCTOR CMLDM7003TG

is a dual Enhancement-mode N-Channel MOSFET,

manufactured by the N-Channel DMOS Process,

designed for high speed pulsed amplifier and driver

applications. This device offers low rDS(ON), low

VGS(th), and ESD protection up to 2kV.

MARKING CODE: CTG

MAXIMUM RATINGS: (TA=25°C)

SYMBOL

UNITS

Drain-Source Voltage

VDS

50

V

Drain-Gate Voltage

VDG

50

V

Gate-Source Voltage

VGS

12

V

Continuous Drain Current

ID

280

mA

Maximum Pulsed Drain Current

IDM

1.5

A

Power Dissipation (Note 1)

PD

350

mW

Power Dissipation (Note 2)

PD

300

mW

Power Dissipation (Note 3)

PD

150

mW

Operating and Storage Junction Temperature

TJ, Tstg

-65 to +150

°C

Thermal Resistance

ΘJA

357

°C/W

ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (TA=25°C unless otherwise noted)

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

IGSSF, IGSSR

VGS=5.0V

50

nA

IGSSF, IGSSR

VGS=10V

0.5

μA

IGSSF, IGSSR

VGS=12V

1.0

μA

IDSS

VDS=50V, VGS=0

50

nA

BVDSS

VGS=0, ID=10μA

50

V

VGS(th)

VDS=VGS, ID=250μA

0.7

1.2

V

VSD

VGS=0, IS=115mA

1.4

V

rDS(ON)

VGS=1.8V, ID=50mA

1.6

2.3

Ω

rDS(ON)

VGS=2.5V, ID=50mA

1.3

1.9

Ω

rDS(ON)

VGS=5.0V, ID=50mA

1.1

1.5

Ω

gFS

VDS=10V, ID=200mA

200

mS

Crss

VDS=25V, VGS=0, f=1.0MHz

5.0

pF

Ciss

VDS=25V, VGS=0, f=1.0MHz

50

pF

Coss

VDS=25V, VGS=0, f=1.0MHz

25

pF

• Device is Halogen Free by design

SOT-563 CASE

R2 (15-April 2010)

www.centra lsemi.com