MICRF600Z datasheet(16/21 Pages) MICREL

16 / 21 page

Micrel, Inc.

MICRF600/MICRF600Z

July 2006

M9999-082505

RSSI

33kohm, 1nF, 20kbps, BW=200kHz, Vdd=2.5V

0,5

0,75

1,25

1,5

1,75

2,25

-120

-110

-100

-90

-80

-70

-60

-50

Input power [dBm]

Figure 10. RSSI Voltage

A Typical plot of the RSSI voltage as function of input

power is shown in Figure 10. The RSSI has a dynamic

range of about 50dB from about -110dBm to -60dBm input

power.

The RSSI can be used as a signal presence indicator.

When a RF signal is received, the RSSI output increases.

This could be used to wake up circuitry that is normally in

a sleep mode configuration to conserve battery life.

Another application for which the RSSI could be used is to

determine if transmit power can be reduced in a system. If

the RSSI detects a strong signal, it could tell the

transmitter to reduce the transmit power to reduce current

consumption.

FEE

A6..A0

0010101

FEEC_3

FEEC_2

FEEC_1

FEEC_0

0010110

FEE_7

FEE_6

FEE_5

FEE_4

FEE_3

FEE_2

FEE_1

FEE_0

The Frequency Error Estimator (FEE) uses information

from the demodulator to calculate the frequency offset

between the receive frequency and the transmitter

frequency. The output of the FEE can be used to tune the

XCO frequency, both for production calibration and for

compensation for crystal temperature drift and aging.

The input to the FEE circuit are the up and down pulses

from the demodulator. Every time a ‘1’ is updated, an UP-

pulse is coming out of the demodulator and the same with

the DN-pulse every time the ‘0’ is updated. The expected

no. of pulses for every received symbol is 2 times the

modulation index (∆).

The FEE can operate in three different modes; counting

only UP-pulses, only DN-pulses or counting UP+DN

pulses. The no. of received symbols to be counted is either

8, 16, 32 or 64. This is set by the FEEC_0…FEEC_3

control bit, as follows:

FEEC_1

FEEC_0

FEE Mode

Off

Counting UP pulses

Counting DN pulses

Counting UP and DN pulses. UP

increments the counter, DN

decrements it.

FEEC_3

FEEC_2

No. of symbols used for the

measurement

Table 8. FEEC Control Bit

The result of the measurement is the FEE value, this can

be read from register with address 0010110b. Negative

values are stored as a binary no between 0000000 and

1111111. To calculate the negative value, a two’s

complement of this value must be performed. Only FEE

modes where DN-pulses are counted (10 and 11) will give

a negative value.

When the FEE value has been read, the frequency offset

can be calculated as follows:

Mode UP:

Foffset = R/(2P)x(FEE-∆Fp)

Mode DN:

Foffset = R/(2P)x(FEE+∆Fp)

Mode UP+DN: Foffset = R/(4P)x(FEE)

where FEE is the value stored in the FEE register, (Fp is

the single sided frequency deviation, P is the no. of

symbols/data bit counted and R is the symbol/data rate. A

positive Foffset means that the received signal has a

higher frequency than the receiver frequency. To

compensate for this, the receivers XCO frequency should

be increased.

It is recommended to use Mode UP+DN for two reasons,

you do not need to know the actual frequency deviation

and this mode gives the best accuracy.

Bit Synchronizer

A6..A0

0000110

‘0’

BitSync_clkS2 BitSync_clkS1 BitSync_clkS0 BitRate_clkS2

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