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NP74N04YUG Datasheet(PDF) 2 Page - Renesas Technology Corp |
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NP74N04YUG Datasheet(HTML) 2 Page - Renesas Technology Corp |
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2 / 8 page ![]() NP74N04YUG Chapter Title R07DS0017EJ0100 Rev.1.00 Page 2 of 6 Jul 01, 2010 Electrical Characteristics (TA = 25 °C) Item Symbol Min Typ Max Unit Test Conditions Zero Gate Voltage Drain Current IDSS 1 μA VDS = 40 V, VGS = 0 V Gate Leakage Current IGSS ±100 nA VGS = ±20 V, VDS = 0 V Gate to Source Threshold Voltage VGS(th) 2.0 3.0 4.0 V VDS = VGS, ID = 250 μ A Forward Transfer Admittance ∗ 1 | yfs | 21 42 S VDS = 5 V, ID = 37.5 A Drain to Source On-state Resistance ∗ 1 RDS(on) 4.2 5.5 m Ω VGS = 10 V, ID = 37.5 A Input Capacitance Ciss 3620 5430 pF VDS = 25 V, Output Capacitance Coss 330 500 pF VGS = 0 V, Reverse Transfer Capacitance Crss 220 400 pF f = 1 MHz Turn-on Delay Time td(on) 26 52 ns VDD = 20 V, ID = 37.5 A, Rise Time tr 10 25 ns VGS = 10 V, Turn-off Delay Time td(off) 62 124 ns RG = 0 Ω Fall Time tf 6 15 ns Total Gate Charge QG 64 96 nC Gate to Source Charge QGS 17 nC Gate to Drain Charge QGD 21 nC VDD = 32 V, VGS = 10 V, ID = 75 A Body Diode Forward Voltage ∗ 1 VF(S-D) 0.94 1.5 V IF = 75 A, VGS = 0 V Reverse Recovery Time trr 38 ns Reverse Recovery Charge Qrr 44 nC IF = 75 A, VGS = 0 V, di/dt = 100 A/ μ s Note: ∗1. Pulsed TEST CIRCUIT 3 GATE CHARGE VGS = 20 → 0 V PG. RG = 25 Ω 50 Ω D.U.T. L VDD TEST CIRCUIT 1 AVALANCHE CAPABILITY PG. D.U.T. RL VDD TEST CIRCUIT 2 SWITCHING TIME RG PG. IG = 2 mA 50 Ω D.U.T. RL VDD ID VDD IAS VDS BVDSS Starting Tch VGS 0 = 1 s Duty Cycle ≤ 1% τ μ τ VGS Wave Form VDS Wave Form VGS VDS 10% 0 0 90% 90% 90% VGS VDS ton toff td(on) tr td(off) tf 10% 10% |
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