P0143-01

CC2543

RHM Package

(Top View)

VDD

P1_3

32

9

31

10

30

11

29

12

28

13

27

14

26

15

25

16

24

1

23

2

22

3

21

4

20

5

19

6

18

7

17

8

VDD

VSS

RF_N

RF_P

VSS

VDD

XOSC_Q2

P2_1/DD

P2_0

P0_7

P0_6

P0_5

P0_4

P0_3

VSS

Ground Pad

CC2543

www.ti.com

SWRS107B – APRIL 2012 – REVISED MAY 2012

DEVICE INFORMATION

PIN DESCRIPTIONS

NOTE: The exposed ground pad must be connected to a solid ground plane; this is the main ground connection for the chip.

Table 1. Pin Description Table

NAME

PIN

PIN TYPE

DESCRIPTION

P1_3

1

Digital I/O

Port 1.3

P2_1/DD

2

Digital I/O /

Port 2.1 / Debug Data

Debug

P2_0

3

Digital I/O

Port 2.0

P0_7

4

Digital I/O

Port 0.7

P0_6

5

Digital I/O

Port 0.6

P0_5

6

Digital I/O

Port 0.5

P0_4

7

Digital I/O

Port 0.4

P0_3

8

Digital I/O

Port 0.3

P0_2

9

Digital I/O

Port 0.2

P0_1

10

Digital I/O

Port 0.1

P0_0

11

Digital I/O

Port 0.0

VDD

12

Power (analog)

2-V-3.6V analog power-supply connection

RESET_N

13

Digital input

Reset, active-low

P2_2/DC

14

Digital I/O /

Port 2.2 / Debug Clock

Debug

VDD

15

Power (analog)

2-V-3.6V analog power-supply connection

XOSC_Q1

16

Analog O

32-MHz crystal oscillator pin 1

XOSC_Q2

17

Analog O

32-MHz crystal oscillator pin 2

VDD

18

Power (analog)

2-V-3.6V analog power-supply connection

VSS

19

Unused pin

Connect to ground

RF_P

20

RF I/O

Positive RF input signal to LNA during RX

Positive RF output signal from PA during TX

Copyright © 2012, Texas Instruments Incorporated

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