AD8052LVISO8 datasheet(10/14 Pages) CADEKA

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Data Sheet

Application Information

General Description

The AD8052LV is a single supply, general purpose, volt-

age-feedback amplifier fabricated on a complementary

bipolar process using a patent pending topography. They

feature a rail-to-rail output stage and is unity gain stable.

Both gain bandwidth and slew rate are insensitive to tem-

perature.

The common mode input range extends to 300mV below

ground and to 1.2V below Vs. Exceeding these values

will not cause phase reversal. However, if the input volt-

age exceeds the rails by more than 0.5V, the input ESD

devices will begin to conduct. The output will stay at the

rail during this overdrive condition.

The design uses a Darlington output stage. The output

stage is short circuit protected and offers “soft” saturation

protection that improves recovery time.

Figures 1, 2, and 3 illustrate typical circuit configurations for

non-inverting, inverting, and unity gain topologies for dual

supply applications. They show the recommended bypass

capacitor values and overall closed loop gain equations.

Figure 4 shows the typical non-inverting gain circuit for

single supply applicaitons.

0.1μF

6.8μF

Output

G = 1 + (Rf/Rg)

Input

+Vs

-Vs

0.1μF

6.8μF

Figure 1. Typical Non-Inverting Gain Circuit

0.1μF

6.8μF

Output

G = - (Rf/Rg)

For optimum input offset

voltage set R1 = Rf || Rg

Input

+Vs

-Vs

0.1μF

6.8μF

Figure 2. Typical Inverting Gain Circuit

0.1μF

6.8μF

Output

G = 1

Input

+Vs

-Vs

0.1μF

6.8μF

Figure 3. Unity Gain Circuit

0.01µF

6.8μF

Out

+Vs

Figure 4. Single Supply Non-Inverting Gain Circuit

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