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LT3759

3759fb

Due to the current limit function of the SENSE pin, RSENSE

should be selected to guarantee that the peak current sense

voltage VSENSE(PEAK) during steady state normal opera-

tion is lower than the SENSE current limit threshold (see

the Electrical Characteristics table). Given a 20% margin,

VSENSE(PEAK) is set to be 40mV. Then, the maximum switch

ripple current percentage can be calculated using the fol-

lowing equation:

DVSENSE

40mV

- 0.5• DVSENSE

χ is used in subsequent design examples to calculate

inductor value. ΔVSENSEistheripplevoltageacrossRSENSE.

The LT3759 has internal slope compensation to stabilize

the control loop against sub-harmonic oscillation. When

the LT3759 operates at a high duty cycle in continuous

conduction mode, the SENSE voltage ripple ΔVSENSE (re-

fer to Figure 2) needs to be limited to ensure the internal

slope compensation is sufficient to stabilize the control

loop. Figure 3 shows the maximum allowed ΔVSENSE over

the duty cycle. It is recommended to check and ensure

ΔVSENSE is below the curve at the highest duty cycle.

Figure 4. The RC Filter on SENSE pin

APPLICATIONS INFORMATION

The LT3759 switching controller incorporates 100ns timing

interval to blank the ringing on the current sense signal

immediately after M1 is turned on. This ringing is caused

by the parasitic inductance and capacitance of the PCB

trace, the sense resistor, the diode, and the MOSFET. The

100ns timing interval is adequate for most of the LT3759

applications. In the applications that have very large and

long ringing on the current sense signal, a small RC filter

can be added to filter out the excess ringing. Figure 4

shows the RC filter on SENSE pin. It is usually sufficient

to choose 22Ω for RFLT and 2.2nF to 10nF for CFLT. Keep

RFLT’s resistance low. Remember that there is 50μA (typi-

cal) flowing out of the SENSE pin. Adding RFLT will affect

the SENSE current limit threshold:

VSENSE _ILIM = 50mV − 50μA • RFLT

CFLT

3759 F04

LT3759

RFLT

RSENSE

SENSE

GATE

GND

Figure 3. The Maximum Allowed SENSE Voltage Ripple vs

Duty Cycle

DUTY CYCLE

3759 F03

0.1

0.5 0.6 0.7

0.2 0.3 0.4

0.8 0.9

APPLICATION CIRCUITS

The LT3759 can be configured as different topologies.

The design procedure for component selection differs

somewhat between these topologies. The first topology

to be analyzed will be the boost converter, followed by the

flyback SEPIC and inverting converters.

Boost Converter: Switch Duty Cycle and Frequency

The LT3759 can be configured as a boost converter for

the applications where the converter output voltage is

higher than the input voltage. Remember that boost con-

verters are not short-circuit protected. Under a shorted

output condition, the inductor current is limited only by

the input supply capability. For applications requiring a

step-up converter that is short-circuit protected, please

refer to the Applications Information section covering

SEPIC converters.

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