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LTC3226

3226fa

OPERATION

CAPGOOD Status Output

The LTC3226 charge pump includes a comparator to re-

port the status of the supercapacitors via an open-drain

NMOS transistor on the CAPGOOD pin. This pin is pulled

to ground until the CPO pin voltage rises to within 7.5%

of the programmed value. Once the CPO pin is above this

threshold, the CAPGOOD pin goes high impedance.

PROG Pin Short-Circuit Protection

Typically the maximum current that the LTC3226 charge

pump can deliver is set by the PROG resistor. However, if

for any reason, the PROG pin gets shorted to GND, or the

user chooses a PROG resistor value which is far smaller

than recommended, the charge pump input current is

limited to an internally set value of approximately 600mA.

Also the maximum current that can be sourced from the

PROG pin is limited by an internal resistor to less than 1mA.

LOW DROPOUT REGULATOR (LDO)

Another principal circuit component of the LTC3226 is the

low dropout regulator (LDO) which transfers power from

the supercapacitor stack to VOUT through a pass element

with an RDS(ON) of approximately 200mΩ. This LDO has

a current limit internally set to 4A. In the event that the

input supply voltage falls below the PFI threshold, the PFI

comparator promptly turns on the LDO to supply the nec-

essary load without letting the VOUT rail droop too much.

However, to prevent unrestricted current flow from the

input to the supercapacitors through the ideal diode, the

LDO is turned off until the CPO voltage is greater than VIN

by 100mV typical. The LDO output voltage is programmed

through an external resistor divider via the LDO_FB pin.

POWER-FAIL (PFI) COMPARATOR

The LTC3226 contains a fast comparator which switches

the part from normal to backup mode in the event the

input voltage, VIN, falls below an externally programmed

threshold voltage. In backup mode, the charge pump

shuts off and the LDO powers the load as long as there

is enough charge stored on the supercapacitors. The PFI

threshold voltage is programmed by an external resistor

divider via the PFI pin. The output of the PFI comparator

also drives the gate of an open-drain NMOS to report the

status via the PFO pin. In normal mode, the PFO pin is

high Impedance but in backup mode, the pin is pulled

down to ground.

IDEAL DIODE CONTROLLER

The LTC3226 contains an ideal diode controller which

controls the gate of an external PFET connected between

the input, VIN, and the output, VOUT, through the GATE

pin. Under normal operating conditions, this external FET

constitutes the main power path from input to output. For

very light loads, the controller maintains a 15mV delta

across the FET between the input and output voltage. In

the event VIN suddenly drops below VOUT, the controller

quickly turns the FET completely off to prevent any reverse

conduction from VOUT back to the input supply.

RESET COMPARATOR

The LTC3226 contains a RESET comparator which moni-

tors VOUT under all operating modes via the RST_FB pin

and reports the status via an open-drain NMOS transis-

tor on the RST pin. At any time, if VOUT falls 7.5% from

its programmed value, it pulls the RST pin low almost

instantaneously. However, on the rising edge the compara-

tor waits 290ms after VOUT crosses the threshold before

making the RST pin high impedance.

GLOBAL THERMAL SHUTDOWN

The LTC3226 includes a global thermal shutdown which

shuts down the entire part in the event the die temperature

exceeds 152°C. It resumes normal operation once the

temperature drops by about 15°C to approximately 137°C.

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