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MMA685X Datasheet(PDF) 44 Page - Freescale Semiconductor, Inc |
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MMA685X Datasheet(HTML) 44 Page - Freescale Semiconductor, Inc |
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44 / 52 page  Sensors 44 Freescale Semiconductor, Inc. MMA685x 4.2 SPI Response Format Table 27. SPI Response Message Summary MSB LSB 15 14 13 12 11 10 98 76543210 CMD A AX Response to Valid Acceleration Request Data Type Reference OC 0 AX P S1 S0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 OC = Offset Cancelled Data Requested 0 Transferred Accel Data is Offset Cancelled Data 1 Transferred Accel Data is Raw Data AX = Axis Requested 0 Acceleration Data Response 1N/A P = Odd Parity S[1:0] = Device Status 0 0 In Initialization (ENDINIT = ‘0’) 0 1 Normal Data Request 1 0 ST Active, ΣΔ/Offset Over range Present 1 1 Internal Error Present / SPI Error CMD A AX OC 0 AX P S1 S0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Data Type Reference Valid Accel Data Request 1 0 OC 0 0 P 0 1 Acceleration Data Accel Section 4.3 1 0 OC 0 0 P 1 0 Self-Test Active Acceleration Data Accel 1 0 OC 0 0 P 0 0 Acceleration Data, Initialization in Process (ENDINIT=’0’) Accel 1 1 OC 0 1 P 0 1 Invalid Accel Request N/A 1 1 OC 0 1 P 1 0 Invalid Accel Request N/A 1 1 OC 0 1 P 0 0 Invalid Accel Request N/A MSB LSB 15 14 13 12 11 10 98 76543210 CMD A AX Response to Valid Register Access Data Type Reference D15 D14 AX P D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Register Write 0 1 0 0 1 P 1110 D7 D6 D5 D4 D3 D2 D1 D0 Register Write Section 4.4.1 New Contents of Register Register Read 0 0 0 1 0 P 1110 D7 D6 D5 D4 D3 D2 D1 D0 Register Read Section 4.4.2 Contents of Register MSB LSB 15 14 13 12 11 10 98 76543210 CMD A AX Error Responses Data Type Reference D15 D14 AX P D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Invalid Accel Request xx 00 0 P 1 1 SD = 1: 00 0000 0000 SD = 0: 10 0000 0000 Register Setting Mismatch Section 4.3 Internal Error Present xx IDE Bit Set (Excl. Self-Test), DEVINIT Bit Set DEVRES Bit Set Section 4.5.5 MISO Error xx MISO Error on Previous Msg Section 4.5.2 SPI Error x x MOSI Parity CMD Bit 15 = 1 SPI Timing Err SPI Mismatch Err SPI Protocol Errs Section 4.5.1 Invalid Register Request 0 x 0 0 001110 00000000 Invalid Reg Addr, Write while ENDINIT set, Write to R/O Reg Section 4.4 Self-Test Error 0x 0 0 1 P 1 1 SD = 1: 00 0000 0000 SD = 0: 10 0000 0000 IDE Bit set due to Self-Test Error Section 4.5.5 |
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