33880 datasheet(18/25 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33880

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

SHORTED LOAD FAULT

A shorted load (overcurrent) fault can be caused by any

output being shorted directly to supply or an output causing

the device to current limit (linear short).

There are two safety circuits progressively in operation

during load short conditions providing system protection:

1. The device’s output current is monitored in an analog

fashion using SENSEFET

™ approach and current

limited.

2. The device’s output thermal limit is sensed and when

attained causes only the specific faulted output to shut

down. The output will remain off until cooled. The

device will then reassert the output automatically. The

cycle will continue until the fault is remove or the

command bit instructs the output off.

UNDERVOLTAGE SHUTDOWN

An undervoltage VDD condition will result in the global

shutdown of all outputs. The undervoltage threshold is

between 3.9 V and 4.6 V. When VDD goes below the

threshold, all outputs are turned OFF and the Fault Status

(FS) register is cleared. As VDD returns to normal levels, the

FS register will resume normal operation.

An undervoltage condition at the VPWR pin will not cause

output shutdown and reset. When VPWR is between 5.5 V

and 9.0 V, the output will operate per the command word.

However, the status as reported by the serial data output

(DO) pin may not be accurate below 9.0 V VPWR. Proper

operation at VPWR voltages below 5.5 V cannot be

guaranteed.

OUTPUT VOLTAGE CLAMP

Each output of the 33880 incorporates an internal voltage

clamp to provide fast turn-off and transient protection of each

output. Each clamp independently limits the drain-to-source

voltage to 45 V for low-side drive configurations and -20 V for

high-side drive configurations (see Figure 25). The total

energy clamped (EJ) can be calculated by multiplying the

current area under the current curve (IA) times the clamp

voltage (VCL).

Characterization of the output clamps, using a single pulse

non-repetitive method at 0.3 A, indicates the maximum

energy to be 50 mJ at 150°C junction temperature per output.

Figure 25. Output Voltage Clamping

SPI CONFIGURATIONS

The SPI configuration on the 33880 device is consistent

with other devices in the OSS family. This device may be

used in serial SPI or parallel SPI with the 33291 and 33298.

Different SPI configurations may be provided. For more

information, contact Analog Products Division.

REVERSE BATTERY

The 33880 has been designed with reverse battery

protection on the VPWR pin. However, the device does not

protect the load from reverse battery. During the reverse

battery condition, current will flow through the load via the

output MOSFET substrate diode. Under this circumstance

relays may energize and lamps will turn on. If load reverse

battery protection is desired, a diode must be placed in series

with the load.

Current

Area (IA)

Clamp Energy

(EJ = IA x VCL)

Clamp Energy

(EJ = IA x VCL)

Drain Voltage

Source Voltage

Time

Drain-to-Source Clamp

Voltage (VCL = 45 V)

Drain Current

(ID = 0.3 A)

GND

VBAT

Drain-to-Source ON

Voltage (VDS(ON))

Drain-to-Source ON

Voltage (VDS(ON))

Current

Area (IA)

Source Current

(IS = 0.3 A)

Source Clamp Voltage

(VCL = -20 V)

33880 Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc

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