SL4020B

System Logic

Semiconductor

SLS

14 Stage Ripple-Carry Binary Counter/Divider

High-Voltage Silicon-Gate CMOS

The SL4020B is ripple-carry binary counter. All counter stages are

master-slave flip-flops. The state of a counter advances one count on

the negative transition of each input pulse; a high level on the RESET

line resets the counter to its all zeros state. Schmitt trigger action on the

input-pulse line permits unlimited rise and fall times.

• Operating Voltage Range: 3.0 to 18 V

• Maximum input current of 1 µA at 18 V over full package-

temperature range; 100 nA at 18 V and 25

°C

• Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

ORDERING INFORMATION

SL4020BN Plastic

SL4020BD SOIC

° to 125° C for all packages

LOGIC DIAGRAM

PIN 8 = GND

PIN ASSIGNMENT

FUNCTION TABLE

Inputs

Output

Clock

Reset

Output state

L

No change

L

Advance to

next state

X

H

All Outputs

are low

X=don’t care