SL4060B

System Logic

Semiconductor

SLS

Figure 1. Swi tching Waveforms

Figure 2. Switching Waveforms

Figure 3. Switching Waveforms

EXPANDED LOGIC DIAGRAM

* R = HIGH DOMINATES (RESETS ALL STAGES)

** COUNTER ADVANCES ONE BINARY COUNT ON EACH NEGATIVE - GOING TRANSITION OF CLOCK

(AND OSC OUT)