AS3422 datasheet(43/61 Pages) AMSCO

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AS3421 AS3422

Datasheet - R e g i s t e r D e s c r i p t i o n

Table 37. CONFIG_1 Register

Name

Base

Default

CONFIG_1

2-wire serial

00h

Offset: 3Eh

OTP Configuration Register

Controls the clock configuration. This is a special register, writing needs to be enabled by writing 9h to

Reg 20h first. This register is reset at POR and gets loaded with the OTP fuse contents.

Bit

Bit Name

Default

Access

Bit Description

7:4

0000

n/a

EXTBURNCLK

n/a

0: ext. clock for OTP burning disabled

1: ext. clock for OTP burning enabled

2:0

000

n/a

Table 38. CONFIG_2 Register

Name

Base

Default

CONFIG_2

2-wire serial

00h

Offset: 3Fh

OTP Access Configuration Register

Controls the OTP access. This is a special register, writing needs to be enabled by writing 9h to Reg 20h

first. This register is reset at POR and gets loaded with the OTP fuse contents.

Bit

Bit Name

Default

Access

Bit Description

7:6

000

n/a

TM34

n/a

This Register defines the Register bank selection for Register

TM_REG34-35 and TMREG30-33. Depending on TM34 you can select

either between Register bank 14h-17h and 10h-13h enabled or 30h-33h and

34h-37h enabled.

0: test mode Registers 14h-17h and 10h-13h disabled

test mode Registers 30h-33h and 34h-37h enabled

1: test mode Registers 14h-17h and 10h-13h enabled

test mode Registers 30h-33h and 34h-37h disabled

BURNSW

n/a

0: BURN switch from LINL to VNEG is disabled

1: BURN switch from LINL to VNEG is enabled

TM_REG34-35

n/a

0: test mode for Register 34h-35h disabled

test mode for Register 14h-17h disabled

1: test mode for Register 34h-35h enabled

test mode for Register 14h-17h enabled

TM_REG30-33

n/a

0: test mode for Register 30h-33h disabled

test mode for Register 10h-13h disabled

1: test mode for Register 30h-33h enabled

test mode for Register 10h-13h enabled

1:0

OTP_MODE<1:0>

R/W

Controls the OTP access

00: READ

01: LOAD

10: WRITE

11: BURN

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