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74ACT16833 Datasheet(PDF) 7 Page - Texas Instruments |
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74ACT16833 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 9 page ![]() 54ACT16833, 74ACT16833 DUAL 8BIT TO 9BIT PARITY BUS TRANSCEIVERS SCAS166A − JUNE 1990 − REVISED APRIL 1996 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1 and timing waveforms) TA = 25°C 54ACT16833 74ACT16833 UNIT MIN MAX MIN MAX MIN MAX UNIT tw Pulse duration CLK high or low 4 4 4 ns tw Pulse duration CLR low 4 4 4 ns tsu Setup time before CLK ↑ Bi + PARITY 7.5 7.5 7.5 ns tsu Setup time before CLK ↑ CLR inactive 1.5 1.5 1.5 ns th Hold time, Bi + PARITY low after CLK ↑ 0 0 0 ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1 and timing waveforms) PARAMETER FROM TO TA = 25°C 54ACT16833 74ACT16833 UNIT PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT tPLH A or B B or A 4 7.2 9.2 4 10.4 4 10.4 ns tPHL A or B B or A 3.2 6.6 9.6 3.2 10.7 3.2 10.7 ns tPLH A PARITY 3.9 7.9 12 3.9 13.5 3.9 13.5 ns tPHL A PARITY 4.2 8.3 12.4 4.2 13.8 4.2 13.8 ns tPZH OEB or OEA A or B 3.1 6.7 10.1 3.1 11.2 3.1 11.2 ns tPZL OEB or OEA A or B 3.8 7.9 11.6 3.8 13 3.8 13 ns tPHZ OEB or OEA A or B 5.5 7.8 10 5.5 10.8 5.5 10.8 ns tPLZ OEB or OEA A or B 5 7.1 9.3 5 10.1 5 10.1 ns tPLH CLR ERR 10.7 13.1 15.4 10.7 15.8 10.7 15.8 ns tPHL CLK ERR 4.6 7.8 10.3 4.6 11.6 4.6 11.6 ns tPLH OEA PARITY 4 8 11.8 4 13.2 4 13.2 ns tPHL OEA PARITY 4.3 8.5 12.3 4.3 13.6 4.3 13.6 ns tPZH OEB PARITY 2.6 5.7 8.5 2.6 9.5 2.6 9.5 ns tPZL OEB PARITY 3.4 6.8 9.8 3.4 10.7 3.4 10.7 ns tPHZ OEB PARITY 5.6 7.9 9.5 5.6 10.2 5.6 10.2 ns tPLZ OEB PARITY 5.1 7.2 9.1 5.1 9.7 5.1 9.7 ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT Outputs enabled A to B 64 Cpd Power dissipation capacitance per transceiver Outputs enabled B to A CL = 50 pF, f = 1 MHz 72 pF Cpd Power dissipation capacitance per transceiver Outputs disabled A to B CL = 50 pF, f = 1 MHz 6 pF Outputs disabled B to A 10.5 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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