their own intellectual property or

use value-added functions from

TI’s extensive network of third-

party solutions providers.

This high degree of flexibility

begins with the chipset’s fully

programmable TMS320C6000™

DSP architecture and robust

design tools. TI adds easy access

to this programmable platform

with its eXpress DSP/BIOS

time DSP software development

environment. The ARM7™ core is

also available for software cus-

tomization and specific control

functions. The result is a total

solution that allows manufactur-

ers to differentiate themselves

through advanced services and

customer-specific application

improvements.

Complete Voice and Data Solution

The AC5 chipset is optimized for

voice transport, with each modem

supporting multiple dual latency

channels to carry time sensitive

voice traffic in addition to data

traffic. The chipset fully supports

VoDSL (VoIP and VoATM) in

addition to embedded voice-over

ADSL (VoADSL) fast path trans-

port mechanism, enabling an

inexpensive digital voice solution

for the residential market. By

combining the AC5 with TI’s

recently announced customer

premise equipment (CPE)

ADSL portfolio and Telogy

GoldenGate™ voice/fax software,

designers have a complete end-to-

end hardware and software voice

architecture.

Full Interoperability and Field Proven

TI is fully committed to real-world

interoperability and offers field-

proven solutions today that meet

telco interoperability requirements.

The AC5 comes complete with

all the hardware and software

necessary to support the

International Telecommunications

Union (ITU) and American

National Standards Institute

(ANSI) standards for ADSL over

plain old telephone service (POTS)

and ADSL over Integrated Services

Digital Network (ISDN). This

includes G.992.1 (G.dmt), G.992.2

(G.lite) and T1.413 issue 2. In

addition, the chipset’s full program-

mability makes upgrading to new

ADSL standards simple through

easy software downloads.

Tx

Rx

Modem

#1

Tx

Rx

Modem

#8

TNETD7102

On-Chip

Interleave RAM

Framer, CRC, FEC,

Interleave Traffic

Encoding & Decoding

Serial Data

I/F

Utopia 2

I/F

Cell

Buffers

TC

Layer

Mgt.

Port

Flash

Port

PCM

I/F

Mgt.

Port

Optional

Flash

Port

PCM

I/F

ARM7

Core

Data & AFE

I/F

SRAM

User

Data

I/Fs

ARM Subsystem

DSP Subsystem

Framer Subsystem

Boot

ROM

SRAM

Cont.

I/F

C6000 Programmable

DSP Core

TNETD5800 Octal-Port ADSL Transceiver Functional Diagram

ac5.qxd

10/5/00

8:34 AM

Page 2