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CDCLVD2104 Datasheet(PDF) 7 Page - Texas Instruments

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Part # CDCLVD2104
Description  Dual 1:4 Low Additive Jitter LVDS Buffer
PDF  21 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCLVD2104 Datasheet(HTML) 7 Page - Texas Instruments

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CDCLVD2104
www.ti.com
SCAS903A – JUNE 2010 – REVISED AUGUST 2010
TYPICAL CHARACTERISTICS
INPUT CLOCK AND OUTPUT CLOCK PHASE NOISES
vs
FREQUENCY FROM THE CARRIER (TA = 25°C and VCC = 2.5V)
Input clock RMS jitter is 32 fs from 10 kHz to 20 MHz and additive RMS jitter is 152 fs
Figure 3. 100 MHz Input and Output Phase Noise Plot
Copyright © 2010, Texas Instruments Incorporated
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