SL74LS245

System Logic

Semiconductor

SLS

Octal 3-State Noninverting

Bus Transceiver

These octal bus transceiver are designed for asynchronous two -

way communication between data buses. The control function

implementation minimized external timing requirements.

The device allows data transmission from the A bus to the B bus or

from the B bus to the A bus depending upon the logic level at the

directional control (DIR) input. The enable input(E) can be used to

disable the device so that the buses are effectively isolated.

• Bidirectional Bus Transceiver in a High-Density 20-Pin Package

• 3-state Outputs Dirve Bus Lines Directly

• P-N-P Inputs D-C Loading on Bus Lines

• Hysteresis at Bus Inputs Improve Noise Margins

• Typical Propagation Delay Times; Port to Port ... 8 ns

ORDERING INFORMATION

SL74LS245N Plastic

SL74LS245D SOIC

° to 70° C

for all packages

LOGIC DIAGRAM

PIN 10 = GND

PIN ASSIGNMENT

FUNCTION TABLE

Control Inputs

Output

Enable

Direction

Operation

L

L

Data Transmitted

from Bus B to Bus

A

L

H

Data Transmitted

from Bus A to Bus

B

H

X

Buses Isolated

(High Impedance

State)

X = don’t care