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TFP410MPAPREP Datasheet(PDF) 15 Page - Texas Instruments |
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TFP410MPAPREP Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 31 page ![]() TFP410-EP PanelBus ™ DIGITAL TRANSMITTER SGLS344A − JULY 2006 − REVISED MAY 2011 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 data deskew feature The deskew feature allows adjustment of the input setup/hold time. Specifically, the input data DATA[23:0] can be latched slightly before or after the latching edge of the clock IDCK± depending on the amount of deskew desired. When deskew enable (DKEN) is enabled, the amount of deskew is programmable by setting the three bits DK[3:1]. When disabled, a default deskew setting is used. To allow maximum flexibility and ease of use, DKEN and DK[3:1] are accessed directly through configuration pins when I2C is disabled, or through registers of the same name when I2C is enabled. When using I2C mode, DKEN should be tied to ground to avoid a floating input. The input setup/hold time can be varied with respect to the input clock by an amount t(CD) given by the formula: t(CD) = (DK[3:1] – 4) × t(STEP) Where: t(STEP) = Adjustment increment amount DK[3:1] = Number from 0 to 7 represented as a 3-bit binary number t(CD) = Cumulative deskew amount (DK[3:1] – 4) is simply a multiplier in the range {–4, –3, –2, –1, 0, 1, 2, 3} for t(STEP). Therefore, data can be latched in increments from four times the value of t(STEP) before the latching edge of the clock to three times the value of t(STEP) after the latching edge. Note that the input clock is not changed, only the time when data is latched with respect to the clock. −t(CD) 000 −4 × t(STEP) 100 0 Default Falling 111 3 × t(STEP) 000 −4 × t(STEP) 100 0 Default Rising 111 3 × t(STEP) DATA[23:0] IDCK± DK[3:1] t(CD) t(CD) −t(CD) t(CD) Figure 8. A Graphical Representation of the De-Skew Function hot plug/unplug (auto connect/disconnect detection) The TFP410 supports hot plug/unplug (auto connect/disconnect detection) for the DVI link. The receiver sense (RSEN) input bit indicates if a DVI receiver is connected to TXC+ and TXC–. The HTPLG bit reflects the current state of the HTPLG pin connected to the monitor via the DVI connector. When I2C is disabled (ISEL = 0), the RSEN value is available on the MSEN pin. When I2C is enabled, the connection status of the DVI link and HTPLG sense pins are provided by the CTL_2_MODE register. The MSEL bits of the CTL_2_MODE register can be used to program the MSEN to output the HTPLG value, the RSEN value, an interrupt, or be disabled. The source of the interrupt event is selected by TSEL in the CTL_2_MODE register. An interrupt is generated by a change in status of the selected signal. The interrupt status is indicated in the MDI bit of CTL_2_MODE and can be output via the MSEN pin. The interrupt continues to be asserted until a 1 is written to the MDI bit, resetting the bit back to 0. Writing 0 to the MDI bit has no effect. |
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