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6.

Functional diagram

Fig 1.

Functional diagram P5CC008V1A and P5CC012 V1A

001aam352

PROGRAMMABLE

IO 1, 3

UART

ISO 7816

ROM

196 KB

PROGRAM

MEMORY

EEPROM

12 KB

DATA AND

PROGRAM

MEMORY

RAM

FAMEXE

ENHANCED PUBLIC

KEY

D-PROCESSOR e.g.

RSA, ECC

6144 B

DATA

MEMORY

CLOCK

FILTER

CLOCK

GENERATION

SECURITY SENSORS

RESET GENERATION

VOLTAGE REGULATOR

16-bit

T0

16-bit

T1

FAST

RNG

TRIPLE-DES

CO-PROCESSOR

PROTECTED LINEAR ADDRESS MAPPING

IO1

CLK

RST_N

VDD

VSS

SECURE_MX51 CPU

CRC16

TIMERS

P5CC008V1A

P5CC012V1A