SST58SD024 datasheet(24/40 Pages) SST

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Data Sheet

ATA-Disk Chip

SST58SD008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192

SST58LD008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192

S71167-05-000

9/01

391

3.2.1.4.14 PIO Data Transfer Cycle Timing Mode

This field defines the mode for PIO data transfer. ADC supports up to PIO Mode-4.

3.2.1.4.15 Translation Parameters Valid

If bit 0 is 1, it indicates that words 54 to 58 are valid and reflect the current number of cylinders, heads

and sectors. If bit 1 is 1, it indicates that words 64 to 70 are valid to support PIO Mode-3 and 4.

3.2.1.4.16 Current Number of Cylinders, Heads, Sectors/Track

These fields contains the current number of user addressable Cylinders, Heads, and Sectors/Track in

the current translation mode.

3.2.1.4.17 Current Capacity

This field contains the product of the current cylinders times heads times sectors.

3.2.1.4.18 Multiple Sector Setting

This field contains a validity flag in the Odd Byte and the current number of sectors that can be

transferred per interrupt for R/W Multiple in the Even Byte. The Odd Byte is always 01H which indicates

that the Even Byte is always valid.

The Even Byte value depends on the value set by the Set Multiple command. The Even Byte of this

word by default contains a 00H which indicates that R/W Multiple commands are not valid.

3.2.1.4.19 Total Sectors Addressable in LBA Mode

This field contains the number of sectors addressable for the ADC in LBA mode only.

3.2.1.4.20 Advanced PIO Data Transfer Mode

ADC supports up to PIO Mode-4.

3.2.1.4.21 Minimum PIO Transfer Cycle Time Without Flow Control

The ADC’s minimum cycle time is 120 ns.

3.2.1.4.22 Minimum PIO Transfer Cycle Time With IORDY

The ADC’s minimum cycle time is 120 ns, e.g., PIO Mode-4.

3.2.1.5 Idle - 97H or E3H

This command causes the ADC to set BSY, enter the Idle Mode, clear BSY and generate an interrupt. If

the sector count is non-zero, it is interpreted as a timer count with each count being 5 milliseconds and

the automatic power down mode is enabled. If the sector count is zero, the automatic power down

mode is also enabled, the timer count is set to 3, with each count being 5 ms. Note that this time base

(5 msec) is different from the ATA specification.

Bit ->

Command (7)

97H or E3H

C/D/H (6)

XDrive

Cyl High (5)

Cyl Low (4)

Sec Num (3)

Sec Cnt (2)

Timer Count (5 msec increments)

Feature (1)

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