– 5 –

CXD2302Q

N

N + 1

N + 2

N + 3

N + 4

N + 1

N

N – 1

N – 2

N – 3

O: Analog signal sampling point

Clock 1.3V

Analog input

Data output

1.3V

Clock

Data output

90%

10%

tr

4ns

tf

4ns

3V

0V

Timing Chart I-2.

3V

tr = 4.5ns

tf = 4.5ns

90%

10%

1.3V

1.3V

10%

90%

1.3V

0V

Output 2

Output 1

OE input

Timing Chart I-1.

Timing Chart I-3.

Digital output

The following table shows the relationship between analog input voltage and digital output code.

Input signal

voltage

Step

Digital output code

MSB

LSB

:

:

:

:

0

:

127

128

:

255

1 1 1 1 1 1 1 1

:

1 0 0 0 0 0 0 0

0 1 1 1 1 1 1 1

:

0 0 0 0 0 0 0 0

Timing Chart I