CXD2453Q datasheet(5/21 Pages) SONY

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CXD2453Q

VDD

TST11

TST12

TST13

VSS

XCLR

TST14

TST15

—

Power supply

Test pin (connect to VDD)

GND

System clear (Low: All clear)

Test pin (Not connected.)

—

∗ H: Pull-up, L: Pull-down

Electrical Characteristics

• DC characteristics

(Topr = –20 to +75°C, VSS = 0V)

Item

Supply voltage

Input voltage 1

Input voltage 2

Input voltage 3

Input voltage 4

Output voltage 1

Output voltage 2

Output voltage 3

Input pull-up/pull-

down resistance

Current

consumption

VDD

VIH1

VIL1

VIH2

VIL2

VIH3

VIL3

(center

level)

VIH4∗1

VIL4∗1

VOH

VOL

VOH

VOL

VOH

VOL

IDD

Symbol

—

3.3V CMOS input

5.0V CMOS input

5.0V CMOS

Schmitt trigger input

Low amplitude

differential input

IOH = –4mA

IOL = 4mA

IOH = –8mA

IOL = 8mA

IOH = –12mA

IOL = 12mA

Pull-up VI = 0V

Pull-down VI = VDD

Master clock = 95MHz

VDD = 3.3V

Output load = 30pF

Conditions

3.0

0.65VDD

VSS

0.65VDD

VSS

0.8VDD

VSS

(VDD

0.606)

– 0.1

VIL4 + 0.3

VSS

VDD – 0.5

VSS

VDD – 0.5

VSS

VDD – 0.5

VSS

—

3.3

—

VDD

0.606

—

3.6

VDD

0.25VDD

VDD + 1.9

0.25VDD

VDD + 1.9

0.2VDD

(VDD

0.606)

+ 0.1

VDD

VIH4 – 0.3

VDD

0.4

VDD

0.4

VDD

0.4

200

Ω

Min.

Typ.

Max.

Unit

—

SLHR, SLFR,

XCLR, SLCK1/2

CKI2, CKI4

SCLK, SDAT, SCTL,

VSYNC, HSYNC

CKI1/XCKI1,

CKI3/XCKI3

∗2

VCK, BLK, VST,

ENB, PCG

HCK1, HCK2,

HST

SLHR, XCLR

SLFR, SLCK1/2

—

Applicable pins

∗1 V

4 > (max. value of VC) and VIL4 < (min. value of VC)

∗2 Output pins other than those indicated in items output voltage 2 and output voltage 3.

No.

Symbol

I/O

Description

Input pin for

open status

CXD2453Q Datasheet(PDF) 5 Page - Sony Corporation

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