TDA7567PD

Software specifications

Doc ID 16903 Rev 1

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Software specifications

The bit 0 of the "Address Byte" defines if the next bytes are write instruction (from µP to

TDA7567PD) or read instruction (from TDA7567PD to µP).

Chip address

X = 0 Write to device

X = 1 Read from device

If R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.

D7

D0

110110

(1)

1.

Address selector bit, please refer to address selection description on Chapter 7.

XD8 Hex

Table 6.

IB1

Bit

Instruction decoding bit

D7

0

D6

Diagnostic enable (D6 = 1)

Diagnostic defeat (D6 = 0)

D5

Offset detection enable (D5 = 1)

Offset detection defeat (D5 = 0)

D4

Front channel

Gain = 26 dB (D4 = 0)

Gain = 16 dB (D4 = 1)

D3

Rear channel

Gain = 26dB (D3 = 0)

Gain = 16dB (D3 = 1)

D2

Mute front channels (D2 = 0)

Unmute front channels (D2 = 1)

D1

Mute rear channels (D1 = 0)

Unmute rear channels (D1 = 1)

D0

CD 2% (D0 = 0)

CD 10% (D0 = 1)

Table 7.

IB2

Bit

Instruction decoding bit

D7

Current detection threshold

High th (D7 = 0)

Low th (D7 =1)

D6

0