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CXG1092N

Application Note (1)

Impedance matching for harmonic minimization

To achieve the 2nd harmonic levels lower than –36dBm for GSM900

Design of 1.8GHz harmonic matching network and the 900MHz trap network is dependent on the board design

and components.

11

12

13

14

15

16

17

18

19

20

10

9

8

7

6

5

4

3

2

1

GND

1800MHz Matching

Network

900MHz Trap

LPF

Tx2

GND

Rx1

GND

Rx2

GND

Rx3

STDBY

Tx1

GND

GND

GND

GSM900 CTL

DCS1800 CTL

PCS1900 CTL

RX ON

GND

ANT

Application Note (2)

Operating the CXG1092 from a 3V supply

Tx1

ANT

Logic lines

Tx2

Rx1

Rx2

Rx3

CXG1092N

≈ 4.0V D.C. Out

577

µs

C

∗

D

200k

R

C

Technique

Allows use of the CXG1092N (SP5T) in handsets

with 3V min. battery voltage (2.7V SW supply).

The CXG1092N is for 5V nominal battery voltage

but work well down to 4V.

Fundamentally, the 577

µs time slot waveform is

used to increase the 2.7V supply to over 4V.

∗

This waveform may be taken from the PA

ramping input (or drain supply in case of drain

power control) or via the TX ON/OFF logic.

Additional Components

C: 0603 CAPS, few

µF

R: 200R

D: Low Turn-on voltage diode

200k

200k