ICX059CL datasheet(2/18 Pages) SONY

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ICX059CL

Substrate voltage SUB – GND

Supply voltage

Vertical clock input voltage

Voltage difference between vertical clock input pins

Voltage difference between horizontal clock input pins

φ1, Hφ2 – Vφ4

φ1, Hφ2, LHφ1, RG, VGG – GND

φ1, Hφ2, LHφ1, RG, VGG – SUB

VL – SUB

φ1, Vφ2, Vφ3, Vφ4, VDD, VOUT – VL

RG – VL

VGG, VSS, H

φ1, Hφ2, LHφ1 – VL

Storage temperature

Operating temperature

Block Diagram and Pin Configuration

(Top View)

Note)

: Photo sensor

Horizontal register

Pin No.

φ4

φ3

φ2

φ1

GND

VGG

VSS

VOUT

Vertical register transfer clock

GND

Output amplifier gate bias

Output amplifier source

Signal output

VDD

GND

SUB

φ1

φ2

Output amplifier drain supply

GND

Substrate (Overflow drain)

Protective transistor bias

Reset gate clock

Horizontal register final stage transfer clock

Horizontal register transfer clock

Symbol

Description

Pin No.

Description

Pin Description

Absolute Maximum Ratings

–0.3 to +55

–0.3 to +18

–55 to +10

–15 to +20

to +10

to +15

to +17

–17 to +17

–10 to +15

–55 to +10

–65 to +0.3

–0.3 to +30

–0.3 to +24

–0.3 to +20

–30 to +80

–10 to +60

°C

∗1

VDD, VOUT, VSS – GND

VDD, VOUT, VSS – SUB

φ1, Vφ2, Vφ3, Vφ4 – GND

φ1, Vφ2, Vφ3, Vφ4 – SUB

Item

Ratings

Unit

Remarks

∗1 +27V (Max.) when clock width < 10µs, clock duty factor < 0.1%.

Symbol

ICX059CL Datasheet(PDF) 2 Page - Sony Corporation

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