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RT7252B Datasheet(PDF) 12 Page - Richtek Technology Corporation

Part # RT7252B
Description  2A, 17V, 340/800kHz Synchronous Step-Down Converter
PDF  14 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT7252B Datasheet(HTML) 12 Page - Richtek Technology Corporation

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RT7252A/B
12
DS7252A/B-01 April 2012
www.richtek.com
©
Copyright
2012 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
RMS current is given by :
OUT
IN
RMS
OUT(MAX)
IN
OUT
V
V
I
= I
1
VV
−
This formula has a maximum at VIN = 2VOUT, where IRMS =
IOUT/2. This simple worst-case condition is commonly used
for design because even significant deviations do not offer
much relief. Choose a capacitor rated at a higher
temperature than required. Several capacitors may also
be paralleled to meet size or height requirements in the
design. For the input capacitor, a 10
μF low ESR ceramic
capacitor is recommended. For the recommended
capacitor, please refer to table 3 for more details. The
selection of COUT is determined by the required ESR to
minimize voltage ripple. Moreover, the amount of bulk
capacitance is also a key for COUT selection to ensure
that the control loop is stable. Loop stability can be
checked by viewing the load transient response as
described in a later section. The output ripple,
ΔVOUT , is
determined by :
OUT
L
OUT
1
VI
ESR
8fC
⎡⎤
Δ≤ Δ
+
⎢⎥
⎣⎦
The output ripple will be highest at the maximum input
voltage since
ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Dry tantalum,
special polymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR value.
However, it provides lower capacitance density than other
types. Although Tantalum capacitors have the highest
capacitance density, it is important to only use types that
pass the surge test for use in switching power supplies.
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant
ringing.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to
ΔILOAD (ESR) also begins to charge or discharge
COUT generating a feedback error signal for the regulator
to return VOUT to its steady-state value. During this
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX)
− TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and
θJAis the junction to ambient
thermal resistance.



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