RT8299 datasheet(12/15 Pages) RICHTEK

12 / 15 page

RT8299

DS8299-01 May 2012

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Figure 6. Derating Curve of Maximum Power Dissipation

Layout Consideration

Follow the PCB layout guidelines for optimal performance

of the RT8299.

Keep the traces of the main current paths as short and

wide as possible.

Put the input capacitor as close as possible to the device

pins (VIN and GND).

SW node is with high frequency voltage swing and should

be kept at small area. Keep analog components away

from the SW node to prevent stray capacitive noise pick-

up.

Connect feedback network behind the output capacitors.

Keep the loop area small. Place the feedback

components near the RT8299.

An example of PCB layout guide is shown in Figure 6 for

reference.

Thermal Considerations

For continuous operation, do not exceed the maximum

operation junction temperature 125

°C. The maximum

power dissipation depends on the thermal resistance of

IC package, PCB layout, the rate of surroundings airflow

and temperature difference between junction to ambient.

The maximum power dissipation can be calculated by

following formula :

PD(MAX) = (TJ(MAX)

− TA) / θJA

Where TJ(MAX) is the maximum operation junction

temperature , TA is the ambient temperature and the

θJAis

the junction to ambient thermal resistance.

For recommended operating condition specifications, the

maximum junction temperature is 125

°C. The junction to

ambient thermal resistance,

θJA, is layout dependent. For

SOP-8 (Exposed Pad) package, the thermal resistance,

θJA, is 75°C/W on a standard JEDEC 51-7 four-layer

thermal test board. For WDFN-10L 3x3 packageS, the

thermal resistance,

θJA, is 70°C/W on a standard JEDEC

51-7 four-layer thermal test board. The maximum power

dissipation at TA = 25

°C can be calculated by the following

formulas :

PD(MAX) = (125

°C − 25°C) / (75°C/W) = 1.333W for

SOP-8 (Exposed Pad) package

PD(MAX) = (125

°C − 25°C) / (70°C/W) = 1.429W for

WDFN-10L 3x3 package

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance,

θJA. The derating curve in Figure 6 allow the

designer to see the effect of rising ambient temperature

on the maximum power dissipation.

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

025

100

125

Ambient Temperature (°C)

Four-Layer PCB

SOP-8 (Exposed Pad)

WDFN-10L 3x3

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