Electronic Components Datasheet Search
  English  ▼

X  

RT8113 Datasheet(PDF) 17 Page - Richtek Technology Corporation

Part # RT8113
Description  Single Phase VR11.1 PWM Controller with 7-bit VID
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT8113 Datasheet(HTML) 17 Page - Richtek Technology Corporation

Back Button RT8113 Datasheet HTML 13Page - Richtek Technology Corporation RT8113 Datasheet HTML 14Page - Richtek Technology Corporation RT8113 Datasheet HTML 15Page - Richtek Technology Corporation RT8113 Datasheet HTML 16Page - Richtek Technology Corporation RT8113 Datasheet HTML 17Page - Richtek Technology Corporation RT8113 Datasheet HTML 18Page - Richtek Technology Corporation RT8113 Datasheet HTML 19Page - Richtek Technology Corporation RT8113 Datasheet HTML 20Page - Richtek Technology Corporation RT8113 Datasheet HTML 21Page - Richtek Technology Corporation  
Zoom Inzoom in Zoom Outzoom out
 17 / 21 page
background image
RT8113
17
DS8113-02 April 2011
www.richtek.com
Load Line
The RT8113 utilizes inductor DCR current sense technique
for load line control function. The sensed inductor current
IX is multiplied by 0.5 and sent to ADJ pin. After the current
0.5 x IX injects into the ADJ resistors, the voltage of the
ADJ pin is established. The VADJ is then multiplied by 0.1
and subtracted by VDAC to generate VEAP. Because IX is a
PTC (Positive Temperature Coefficient) current, an NTC
(Negative Temperature Coefficient) resistor is needed to
connect ADJ pin to GND. If the NTC resistor is properly
selected to compensate the temperature coefficient of IX,
the voltage on ADJ pin will be proportional to IOUT without
temperature effect. In the RT8113, the positive input of
error amplifier is “VDAC
− 0.1 x VADJ” and VOUT will follow
“VDAC − 0.1 x VADJ”. Thus, the output voltage which
decreases linearly with IOUT is obtained. The load line is
defined as :
ADJ
X
ADJ
OUT
ADJ
ADJ
OUT
OUT
CSN
1
V
=
x I x R
2
V
V
DCR x R
1
LL(Load Line) =
=
x
=
I10
I
20 x R
Δ
ΔΔ
ΔΔ
Basically, the resistance of RADJ sets the resistance of
the load line. The temperature coefficient of RADJ
compensates the temperature effect of the load line.
The load line function of the RT8113 can be disabled by
connecting the RT/EN pin resistor to VCC5 instead of
GND. When the RT/EN pin resistor is connected to VCC5,
the current-sense circuit works normally while VEAP no
longer contains droop, and the reference voltage of the
error amplifier will remain equal to VDAC regardless of output
current. The running frequency of the RT8113 will always
be the same whether connecting RT/EN to VCC5 or GND.
Over Current Protection (OCP)
In Figure 8, VOCSET is equal to VCC x R2/(R1 + R2). For
the RT8113, VADJ is proportional to IOUT and is thermally
compensated. Once VADJ is larger than VOCSET, OCP is
triggered and latched. The OCP function will not be
influenced by enabling or disabling load line since the
voltage on the ADJ pin always contains real-time
information of load current. Once OCP is triggered, the
RT8113 will turn off both high-side MOSFETs and low side
MOSFETs.
VCC5 or
VCC12
ADJ
OCSET
OCP
R1
R2
CMP
+
-
Figure 8. Over Current Protection
Over Voltage Protection (OVP)
The over-voltage protection monitors the output voltage
via the FB pin. Once VFB exceeds“VEAP + 150mV”, OVP
is triggered and latched. The RT8113 will turn on low-side
MOSFET and turn off high side MOSFET to protect CPU.
A 20
μs delay is used in OVP detection circuit to prevent
false trigger.
Over Temperature Protection (OTP)
The over-temperature protection function of the RT8113 is
built inside the controller to prevent overheat damage. OTP
occurs when the die temperature of the RT8113 exceeds
160
°C, in which the RT8113 then turns off both high-side
MOSFETs and low side MOSFETs.
Loop Compensation
The RT8113 is a voltage mode controller and requires
external compensation. To compensate a typical voltage
mode buck converter, there are two ordinary compensation
schemes, commonly known as type-II compensator and
type-III compensator. The choice of using type-II or type-
III compensator lies with the platform designers, and the
main concern deals with the position of the capacitor ESR
zero and mid-frequency to high-frequency gain boost.
Typically, the ESR zero of output capacitor will tend to
stabilize the effect of output LC double poles. Hence, the
position of the output capacitor ESR zero in frequency
domain may influence the design of voltage loop
compensation. Figure 9 shows a typical control loop using
type-III compensator. Below is the compensator design
procedure.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com