RT9503A datasheet(13/15 Pages) RICHTEK

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RT9503A

DS9503A-01 April 2011

www.richtek.com

pin and GND pin is recommended. In some applications

depending on the power supply characteristics and cable

length, it may be necessary to add an additional 10

μF

ceramic capacitor to the input. The RT9503A requires a

small output capacitor for loop stability. A 1

μF ceramic

capacitor placed between the BATT pin and GND is typically

sufficient.

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

PD(MAX) = (TJ(MAX)

− TA) / θJA

Where TJ(MAX) is the maximum junction temperature, TA

is the ambient temperature, and

θJA is the junction to

ambient thermal resistance.

For recommended operating condition specifications of

RT9503A, the maximum junction temperature is 125

°C

and TA is the ambient temperature. The junction to ambient

thermal resistance,

θJA, is layout dependent. For

WQFN-16L 3x3 packages, the thermal resistance,

θJA, is

°C/W on a standard JEDEC 51-7 four-layer thermal test

board. The maximum power dissipation at TA = 25

°C can

be calculated by the following formula :

PD(MAX) = (125

°C − 25°C) / (68°C/W) = 1.471W for

WQFN-16L 3x3 package

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance,

θJA. For RT9503Apackage, the derating curve

in Figure 7 allows the designer to see the effect of rising

ambient temperature on the maximum power dissipation.

Figure 7. Derating Curves for RT9503A Package

Layout Consideration

The RT9503A is a fully integrated low cost single-cell Li-

Ion battery charger ideal for portable applications. Careful

PCB layout is necessary. The following guidelines should

be strictly followed to achieve best performance of the

RT9503A.

Input capacitor should be placed close to the IC and

connected to the ground plane. The trace of the input in

the PCB should be placed far away from the sensitive

devices or shielded by the ground.

The GND should be connected to a strong ground plane

for heat sinking and noise protection.

Connection of the RSETA should be isolated from other

noisy traces. A short wire is recommended to prevent

EMI and noise coupling.

Output capacitor should be placed close to the IC and

connected to ground plane to reduce noise coupling.

0.00

0.20

0.40

0.60

0.80

1.00

1.20

1.40

1.60

100

125

Ambient Temperature (°C)

Four-Layer PCB

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