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5002 Datasheet(PDF) 2 Page - Intersil Corporation |
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5002 Datasheet(HTML) 2 Page - Intersil Corporation |
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2 / 12 page ![]() Application Note 1789 2 AN1789.0 December 3, 2012 For 12V VIN and VOUT more than 1.5V, the switching frequency will need to be adjusted, as shown in Table 1. The resistor RFSET can be adjusted for the desired frequency. No frequency adjustments are necessary for VOUT below 1.5V. For 5V VIN, the frequency does not need to be adjusted and the module default frequency can be used at any allowed VOUT. If the output voltage is set to more than 1.8V, the output current will need to be derated to allow for safe operation. Please refer to the derating curves in the ISL8225M datasheet. Board Setting If low current applications are needed, this 90A evaluation board can be easily programmed to 30A and 60A use. 30A Application (1 Module) EN -- Open, EN2-- OFF, EN3 -- OFF In this mode, only module 1 is running and modules 2 and 3 are disabled. 60A Application (2 Modules) EN -- Open, EN2-- ON, EN3 -- OFF Or: EN -- Open, EN2-- OFF, EN3 -- ON In this mode, only modules 1 and 2 (or 3) are running and module 3 (or 2) is disabled. 90A Application (3 Modules) EN -- Open, EN2-- ON, EN3 -- ON In this mode, all modules are running. Disable All Modules and Use the EN Pin to Start the Modules EN -- Connected In this mode, all modules are disabled and EN can be used to control all modules to startup. Evaluation Board Information The evaluation board size is 150mm x 130mm. It is a 6-layer board, containing 2-ounce copper on the top and bottom layers and 1-ounce copper on all internal layers. The board can be used as a 90A reference design. Refer to the “Layout” section beginning on page 7. The board is made of FR4 material and all components, including the solder attachment, are lead-free. Current Sharing Check The evaluation board allows the user to measure the current sharing accuracy. Four zero ohm resistors (i.e. R59~R62 for M1 channel 2 in Figure 2) are put serially on each output with two on each side of the evaluation board. To measure the output current of each phase, please remove all four resistors and put looped wires or sensing resistors on correct positions. Although the assembled resistors have zero resistance, there is still small resistance (< 50mΩ) on each resistor. At large output current, the efficiency can be decreased by 1~3% due to the power loss on those zero ohm resistors. The efficiency curves are shown in Figures 16 and 17 with zero ohm resistors, while Figures 18 and 19 show the efficiency curves by replacing those resistors with short copper straps. Thermal Considerations and Current Derating For high current applications, board layout is very critical in order to make the module operate safely and deliver maximum allowable power. To carry large currents, the board layout needs to be designed carefully to maximize thermal performance. To achieve this, select enough trace width, copper weight and the proper connectors. This evaluation board is designed for running 90A @ 1.2V at room temperature without additional cooling systems needed. However, if the output voltage is increased or the board is operated at elevated temperatures, then the available current is derated. Refer to the derated current curves in the datasheet to determine the output current available. For layout of designs using the ISL8225M, the thermal performance can be improved by adhering to the following design tips: 1. Use the top and bottom layers to carry the large current. VOUT1, VOUT2, Phase 1, Phase 2, PGND, VIN1 and VIN2 should have large, solid planes. Place enough thermal vias to connect the power planes in different layers under and around the module. 2. Phase 1 and Phase 2 pads are switching nodes that generate switching noise. Keep these pads under the module. For noise-sensitive applications, it is recommended to keep phase pads only on the top and inner layers of the PCB; do not place phase pads exposed to the outside on the bottom layer of the PCB. To improve the thermal performance, the phase pads can be extended in the inner layer, as shown in Phase 1 and 2 pads on layer 3 (Figure 11) for this 90A evaluation board. Make sure that layer 2 and layer 4 have the GND layers to cover the extended areas of phase pads at layer 3 to avoid noise coupling. TABLE 1. VALUE OF BOTTOM RESISTOR FOR DIFFERENT OUTPUT VOLTAGES (R1 = 1k) VOUT (V) R2 /R64 (Ω) FREQUENCY (kHz) RFSET (Ω) (VIN = 12V) 0.6 0/0 Default Default 0.8 3010/1500 Default Default 1.0 1500750 Default Default 1.2 1000/500 Default Default 1.5 665/332 Default Default 2.5 316/158 650 249k 3.3 221/110 800 124k 5.0 137/68.1 950 82.5k 5.5 121/60.4 950 82.5k |
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