To establish the frequency modulation, the output of the mark/space up/down-counter gets

added to Nmark. There has to be a smooth frequency-change from mark to space and from

space to mark within half the bit-time with 3 intermediate frequencies.

BD1

BD2

Fspace-Fmark

Baud-Rate (CKTX)

M/S-UDC

BDclk (UDC-CLK)

0

0

600Hz

600Hz

0,1,2,3,4

4800Hz

1

0

1200Hz

1200Hz

0,2,4,6,8

9600Hz

0

1

600Hz

1200Hz

0,1,2,3,4

9600Hz

1

1

1200Hz

2400Hz

0,2,4,6,8

19200Hz

Example with MRK-REG=8 => Fmark=81.75kHz; BD1,2=0 => dF=BRate=600Hz:

545

546 547 548

549

548 547

546

545

BDR*8

TXD (H=mark)

N

Fsynth / 16

81.75

81.90

(kHz)

82.05

82.20

82.35

82.20

82.05

81.75

81.90

(L=space)

In receive-mode(TxEn=1), a constant number Nmix defined by BD1 gets added to Nmark

instead of the output of the M/S-UDC. This gives a constant frequency which is used as

Mixer-frequency to fold the FSK-signal down to 2.7kHz or 5.4kHz. According to the

mixer-frequency the IF-SC-CLK is defined by the timing-block (see 1.1.3).

BD1

BD2

IFcenter

IFbandw

IF-SC-CLK

Nmix

BDclk (UDC-CLK)

0

X

2700Hz

1200Hz

57.6kHz

20

4800Hz

1

X

5400Hz

2400Hz

115.2kHz

40

9600Hz

The second frequency-synthesiser which is a similar structure as described for generating the

FSK-frequencies, is generating the target-frequency for the SCCLK-PLL. To get no

disturbing components, the phase-jitter of the synthesiser has to be reduced by the PLL.

There is a capacitor needed as external low-pass filter, to define the frequency response of the

PLL-loop. To generate the right target-frequency, one half of modulation-depth which is a

factor of 2 or 4 dependent on BD1 has to be added to Nmark. Since the center-frequency is a

very critical parameter, there is a possibility implemented for adjustment by wafersort-trim.

BD1 BD2 Fspace-Fmark

(Fcenter-Fmark)/150Hz

Npll

0

X

600Hz

2

MRK_REG + 426 + Itrim + 2

1

X

1200Hz

4

MRK_REG + 426 + Itrim + 4

(Itrim=0 ... 3 defined at wafer-sort)

AS5501 / AS5502 Multimode Powerline Modem

Data Sheet

Rev A, May 2000

Page 10/25