41594B datasheet(335/372 Pages) MICROCHIP

335 / 372 page

 2011-2012 Microchip Technology Inc.

Preliminary

DS41594B-page 335

PIC12LF1840T48A

TABLE 31-4:

CLKOUT AND I/O TIMING PARAMETERS

FIGURE 31-7:

RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP

TIMER TIMING

Standard Operating Conditions (unless otherwise stated)

Operating Temperature -40°C

TA +125°C

Param

No.

Sym.

Characteristic

Min.

Typ† Max. Units

Conditions

OS11

TosH2ckL FOSC

 to CLKOUT (1)

——

VDD = 3.0-5.0V

OS12

TosH2ckH FOSC

 to CLKOUT (1)

——

VDD = 3.0-5.0V

OS13

TckL2ioV

CLKOUT

 to Port out valid(1)

——

OS14

TioV2ckH

Port input valid before CLKOUT

(1)

TOSC + 200 ns

—

OS15

TosH2ioV

Fosc

 (Q1 cycle) to Port out valid

—

70*

VDD = 3.0-5.0V

OS16

TosH2ioI

Fosc

 (Q2 cycle) to Port input invalid

(I/O in hold time)

—

VDD = 3.0-5.0V

OS17

TioV2osH Port input valid to Fosc

(Q2 cycle)

(I/O in setup time)

—

OS18* TioR

Port output rise time

—

140

VDD = 1.8V

VDD = 3.0-5.0V

OS19* TioF

Port output fall time

—

VDD = 1.8V

VDD = 3.0-5.0V

OS20* Tinp

INT pin input high or low time

—

OS21* Tioc

Interrupt-on-change new input level

time

—

These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25

C unless otherwise stated.

Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x TOSC.

VDD

MCLR

Internal

POR

PWRT

Time-out

OSC

Start-Up Time

Internal Reset(1)

Watchdog Timer

I/O pins

Note 1: Asserted low.

Reset(1)

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