41594B datasheet(339/372 Pages) MICROCHIP

339 / 372 page

 2011-2012 Microchip Technology Inc.

Preliminary

DS41594B-page 339

PIC12LF1840T48A

FIGURE 31-10:

CAPTURE/COMPARE/PWM TIMINGS (CCP)

TABLE 31-7:

CAPTURE/COMPARE/PWM REQUIREMENTS (CCP)

TABLE 31-8:

PIC12LF1840T48A A/D CONVERTER (ADC) CHARACTERISTICS:

Standard Operating Conditions (unless otherwise stated)

Operating Temperature

-40°C

 TA  +125°C

Param

No.

Sym.

Characteristic

Min.

Typ†

Max.

Units

Conditions

CC01* TccL

CCP Input Low Time

No Prescaler

0.5TCY + 20

—

With Prescaler

—

CC02* TccH

CCP Input High Time

No Prescaler

0.5TCY + 20

—

With Prescaler

—

CC03* TccP

CCP Input Period

3TCY + 40

—

N = prescale value (1, 4 or 16)

These parameters are characterized but not tested.

†

Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not

tested.

Standard Operating Conditions (unless otherwise stated)

Operating temperature

25°C

Param

No.

Sym.

Characteristic

Min.

Typ†

Max. Units

Conditions

AD01

Resolution

—

bit

AD02

EIL

Integral Error

—

±1.7

LSb VREF = 3.0V

AD03

EDL

Differential Error

—

±1

LSb No missing codes

VREF = 3.0V

AD04

EOFF Offset Error

—

±2

LSb VREF = 3.0V

AD05

EGN

Gain Error

—

±1.5

LSb VREF = 3.0V

AD06

VREF Reference Voltage(3)

1.8

—

VDD

VVREF = (VREF+ minus VREF-) (NOTE 5)

AD07

VAIN

Full-Scale Range

VSS

—VREF

AD08

ZAIN

Recommended Impedance of

Analog Voltage Source

——

 Can go higher if external 0.01

F capacitor is

present on input pin.

These parameters are characterized but not tested.

†

Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not

tested.

Note 1: Total Absolute Error includes integral, differential, offset and gain errors.

2: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.

3: ADC VREF is from external VREF, VDD pin or FVR, whichever is selected as reference input.

4: When ADC is off, it will not consume any current other than leakage current. The power-down current specification

includes any such leakage from the ADC module.

5: FVR voltage selected must be 2.048V or 4.096V.

Note:

Refer to Figure 31-4 for load conditions.

(Capture mode)

CC01

CC02

CC03

CCP

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